WO2014036803A1

WO2014036803A1 - Light emitting diode flip chip for improving light emitting rate and preparation method thereof

Info

Publication number: WO2014036803A1
Application number: PCT/CN2013/000981
Authority: WO
Inventors: 彭翔; 赵汉民; 张璟
Original assignee: 晶能光电（江西）有限公司
Priority date: 2012-09-07
Filing date: 2013-08-22
Publication date: 2014-03-13
Also published as: CN103682004A; CN103682004B

Abstract

A light emitting diode (LED) (1) flip chip and a preparation method thereof are mainly applicable to an LED flip chip with a sapphire substrate. A metal reflective layer (7) is arranged in an edge area of the LED (1) without an Ag reflective layer (6) covered. More light emitted by an active layer (4) can be sent out through the sapphire substrate (2) after reflection, thereby improving a light emitting rate of the chip, and increasing light emitting efficiency of a component.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting diode technology, particularly a sapphire substrate LED flip chip technology. Background technique

Say

At present, high-power high-brightness LED has become the focus of the development of the LED industry, and is widely used in indoor and outdoor lighting. The traditional high-power core sapphire substrate has a low power conductivity. It is necessary to deposit a semi-transparent Ni/Au conductive layer on the upper surface of the P-type layer to make the current more evenly distributed. The current diffusion layer It absorbs a part of the light and reduces the light efficiency. At the same time, the thermal conductivity of the sapphire is low, resulting in high thermal resistance of the chip. In order to overcome the above shortcomings, flip chip is proposed. The conventional flip chip structure simply flips an ordinary LED chip on a substrate, and the P electrode and the N electrode are soldered to the substrate by a gold ball. The light emitted from the active region is taken out through the transparent sapphire substrate, eliminating the absorption of light by the current diffusion layer and the electrode, and the downward portion is reflected by the reflective layer and then emitted upward, which greatly improves the light efficiency, and the heat passes through. The electrode is directly conducted to the substrate and has good thermal conductivity. However, the connection between the substrate and the chip is only through a limited number of gold balls, and the electrical conductivity and heat dissipation performance are not ideal. In order to improve the performance of the flip chip, after preparing a GaN multilayer structure on a sapphire substrate, a layer of Ag is prepared as a mirror and a P electrode, and Ag at the edge of the chip is removed, and a portion of the Ag layer is etched to the N-type GaN layer. As an N electrode. The chip is inverted on the substrate during use and fixed by eutectic soldering. SUMMARY OF THE INVENTION A first technical problem to be solved by the present invention is to provide a light emitting diode flip chip structure for improving light extraction rate, which is used for improving the light efficiency of a chip. The second technical problem to be solved by the present invention is to provide a method for preparing an LED flip chip which improves the light extraction rate, and the method is used for improving the light efficiency of the chip.

In order to solve the above first technical problem, the present invention provides an LED flip-chip structure for improving light extraction rate, comprising a sapphire substrate, an InGaAIN multilayer structure formed on the sapphire substrate, and the InGaAIN multilayer structure From bottom to top, an N-type GaN layer, an active layer, and a P-type GaN layer, an Ag layer on the P-type GaN layer to remove the device edge, and a protective metal layer formed on the surface of the Ag layer on the surface of the protective metal layer a portion of the region is etched until an N-electrode hole formed by the N-type GaN layer is exposed, a metal N electrode formed in the N-electrode hole, a passivation layer formed on the protective metal layer, and a sidewall formed on the N-electrode hole and the metal The passivation layer between the N electrodes further includes a metal reflective layer formed on the edge of the device, and the metal reflective layer at the edge of the device is located between the P-type GaN layer and the protective metal layer, covering the edge region where the Ag layer is removed.

Preferably, the semiconductor light emitting device further includes a metal reflective layer formed on an edge of the N electrode hole, and the metal reflective layer at the edge of the N electrode hole is located between the P-type GaN layer and the protective metal layer at the edge of the N electrode.

Preferably, the material of the metal reflective layer is Al.

Preferably, the material of the protective metal layer is a Ti/W alloy.

Preferably, the semiconductor light emitting device has a plurality of N electrode holes arranged in an array. Preferably, the shape of the N electrode hole is one or more of a circular shape, a quadrangular shape, and a hexagonal shape.

In order to solve the above second technical problem, the present invention provides a method for fabricating a light emitting diode flip chip for improving light extraction rate, comprising the following steps: preparing InGaAIN on a sapphire substrate a layer structure, the InGaAIN multilayer structure includes an N-type GaN layer, an active layer, and a P-type GaN layer from bottom to top; forming an Ag layer on the P-type GaN layer; removing an Ag layer at a device edge; forming at an edge of the device a metal reflective layer; a protective metal layer is prepared on the surface of the Ag layer; a portion of the surface of the protective metal layer is etched until an N-type GaN layer is exposed to form an N-electrode hole; on the surface of the protective metal, the reflection is said

A passivation layer is prepared on the surface of the metal layer and the inner sidewall of the N electrode hole; a metal N electrode is prepared in the N electrode hole. Preferably, the method for preparing a semiconductor light emitting device further includes an edge of the N electrode hole

A metal reflective layer was prepared. Preferably, the material of the metal reflective layer is Al. Preferably, the material of the protective metal layer is a Ti/W alloy. Preferably, the metal reflective layer forming process is evaporation or sputtering. Preferably, the process of forming the N-electrode hole comprises: etching a portion of the surface of the Ag layer to expose the P-type GaN layer to form a hole; depositing a protective metal layer in the hole and the surface of the Ag layer; etching the protective metal layer in the hole The P-type GaN layer is exposed, and a protective metal layer is left on the sidewall of the Ag layer; an N-electrode hole is formed by ICP dry etching in the hole to expose the N-type GaN layer. Preferably, the process of forming the N-electrode hole comprises: etching a portion of the surface of the Ag layer to expose the P-type GaN layer to form a hole; depositing a protective metal layer in the hole and the surface of the Ag layer; using ICP dry etching to expose The N-type GaN layer has a protective metal layer remaining on the sidewall of the Ag layer to form an N-electrode hole. Preferably, the method for preparing a semiconductor light emitting device further comprises: flipping the device onto the substrate after the preparation is completed, and then removing the sapphire substrate by laser stripping. The beneficial effects of the present invention are as follows: Compared with the prior art, the present invention provides a metal reflective layer in the edge region of the device without the mirror covering during the preparation of the sapphire substrate LED flip chip, so that the light emitted by the active layer is more reflected. The sapphire substrate is injected to improve the luminous efficiency of the device. Further, providing a metal reflective layer at the edge of the electrode hole further increases the reflective area and improves the luminous efficiency of the device. In addition, it can be mounted on the substrate after the device is prepared, and then the laser stripped book can be used.

The method removes the sapphire substrate, reduces the influence of the sapphire substrate on the luminescence, and further improves the luminous efficiency of the device. BRIEF DESCRIPTION OF DRAWINGS FIG. 1 is a plan view of an embodiment of the present invention. 2 is a schematic structural view of an embodiment of the present invention. 3-11 are schematic views of a manufacturing process according to an embodiment of the present invention. The illustrations in the figure are: LED 1, sapphire substrate 2, N-type GaN layer 3, active layer 4, P-type GaN layer 5, Ag layer 6, metal reflective layer 7, protective metal layer 8, N-electrode hole 9, Passivation layer 10, metal N electrode 11, P-type solder electrode 12, N-type solder electrode 13. DETAILED DESCRIPTION OF THE INVENTION The present invention provides an LED flip-chip structure for improving light extraction rate, comprising a sapphire substrate, an InGaAlN multilayer structure formed on the sapphire substrate, the InGaAlN multilayer structure including an N-type from bottom to top a GaN layer, an active layer, and a P-type GaN layer, an Ag layer formed on the P-type GaN layer to remove a device edge, and a protective metal layer formed on the surface of the Ag layer are protected The surface portion of the metal layer is etched until the N electrode hole formed by the N-type GaN layer is exposed, the metal N electrode formed in the N electrode hole, and the passivation layer formed on the protective metal layer are formed on the N electrode hole side. a passivation layer between the wall and the metal N electrode, further comprising a metal reflective layer formed on the edge of the device, the metal reflective layer at the edge of the device being located between the P-type GaN layer and the passivation layer, covering the removed Ag layer Edge area.

The present invention will be further described below by way of embodiments with reference to the accompanying drawings.

1 is a plan view of an embodiment of the present invention. The light-emitting diode 1 may be provided with a single N-electrode hole 9, or a plurality of N-electrode holes 9 in an array. Multiple N-electrode hole structures not only improve the current distribution of the chip, but also effectively improve heat dissipation efficiency. In this embodiment, a light-emitting diode device having 4 X 4 N-electrode holes is taken as an example. The shape of the N electrode hole 9 may be a circular shape as shown in Fig. 1, or may be a quadrilateral, a hexagonal shape or any combination of the above shapes.

As shown in FIG. 2, the light-emitting diodes 1 are sequentially arranged from bottom to top: sapphire substrate 2, N-type GaN layer 3, active layer 4, P-type GaN layer 5, and an Ag layer 6 is formed on the P-type GaN layer 5. As the mirror and the P electrode metal, a portion of the Ag layer 6 at the edge of the device is removed, and a protective metal layer 8 is formed on the surface of the Ag layer 6, and the material of the protective metal layer 8 is a Ti/W alloy.

An N-electrode hole 9 is formed in a portion of the surface of the protective metal layer 8 to be exposed to expose the N-type GaN layer 3, and the metal N-electrode 11 is located in the N-electrode hole 9. A passivation layer 10 is provided on the surface of the protective metal layer 8, and the passivation layer 10 extends between the inner side wall of the N electrode hole 9 and the metal N electrode 11. The metal reflective layer 7 at the edge of the device is located between the P-type GaN layer 5 and the passivation layer 10, covering the edge region where the Ag layer 6 is removed, and the height thereof may be lower than the height of the Ag layer 6, or may be the same as the Ag layer 6. The height is the same, and may also be higher than the height of the Ag layer 6 or even cover the surface of the Ag layer 6 and between the Ag layer 6 and the protective metal layer 8. The metal reflective layer 7 covering the surface of the Ag layer 6 does not affect Ag. The role of layer 6 and protective metal layer 8. The metal reflective layer 7 at the edge of the N electrode hole 9 is located between the P-type GaN layer 5 and the protective metal layer 8 at the edge of the N electrode hole 9. The material of the metal reflective layer 7 is preferably Al.

Further, the light emitting diode 1 further includes a metal N electrode 11 formed in the electrode hole 9, and a P-type splicing electrode 12 formed on the protective metal layer 8 partially exposed by the passivation layer 10, and its shape is as shown in the figure 1 is shown by a broken line frame 121; an N-type welding electrode 13 formed on the surface of the passivation layer and connecting all of the metal N electrodes 11 has a shape as shown by a broken line frame 131 in FIG. The P-type splicing electrode 12 and the N-type welding electrode 13 are separated from each other by a passivation layer 10.

3 to 11 illustrate a method of fabricating the light-emitting diode 1 described in the above embodiment. As shown in Fig. 3, an InGaAIN multilayer structure is prepared on the sapphire substrate 2, and the N-type GaN layer 3, the active layer 4, and the P-type GaN layer 5 are sequentially used from bottom to top.

As shown in Fig. 4, an Ag layer 6 is deposited on the surface of the P-type GaN layer 5 by an evaporation or sputtering process.

As shown in Fig. 5, the Ag layer 6 of the edge region of the device is removed, and a hole is formed in the surface portion of the Ag layer 6 to expose the P-type GaN layer 5 to form a hole.

As shown in Fig. 6, a metal reflective layer 7 is formed in the edges and holes of the device not covered by the Ag layer 6 by an evaporation or sputtering process. The material of the metal reflective layer 7 is preferably Al. The height of the metal reflective layer 7 may be lower than the height of the Ag layer 6, or may be the same as the height of the Ag layer 6, or may be higher than the height of the Ag layer 6 or even the surface of the Ag layer 6.

As shown in FIGS. 7 to 9, a protective metal layer 8 is formed on the surface of the Ag layer 6, and a portion of the surface of the protective metal layer 8 is etched until the N-type GaN layer 3 is exposed to form an N-electrode hole 9. The process can The specification adopts the following process: as shown in FIG. 7, a protective metal layer 8 is deposited on the surface of the Ag layer 6 and the surface of the metal reflective layer 7; as shown in FIG. 8, the protective metal layer 8 in the etched hole exposes the P-type GaN layer 5 And a protective metal layer 8 is left on the sidewall of the Ag layer 6; as shown in FIG. 9, the N-electrode hole 9 is formed by ICP dry etching in the hole to expose the N-type GaN layer 3. It is also possible to simplify the process by removing the step shown in FIG. 8. After the deposition of the protective metal layer 8, the ICP dry etching is directly used to expose the N-type GaN layer 3, and a protective metal is left on the sidewall of the Ag layer 6. Layer 8, an N electrode hole 9 is formed.

As shown in FIG. 10, a passivation layer 10 is deposited on the surface of the device, and the material of the passivation layer 10 may be silicon nitride, silicon oxide or silicon oxynitride. On a portion of the surface outside the N-electrode hole region, the passivation layer 10 is etched to expose the protective metal layer 8; in the N-electrode hole 9, the passivation layer 10 is etched to expose the N-type GaN layer 3 while leaving the N-electrode hole 9 Passivation layer 10 of the sidewall.

As shown in Fig. 11, A1 or Pt is deposited in the N electrode hole 9 to be flush with the surface of the device to form a metal N electrode 11.

Subsequently, an Au or AuSn alloy is deposited as a N-type welding electrode 13 on the surface of the passivation layer, and the N-type welding electrode 13 is connected to all the metal N electrodes 11, and its shape is as shown by a broken line frame 131 in FIG. 1; An Au or AuSn alloy is deposited as a P-type splicing electrode 12 on the protective metal layer 8 which is exposed by etching, and its shape is as shown by a broken line frame 121 in FIG. The cross-sectional structure of the chip after preparation is as shown in Fig. 2.

In addition, after the device is mounted on the substrate, the sapphire substrate 2 is removed by laser lift-off, which further improves the light efficiency of the chip.

Claims

Claim

A semiconductor light emitting device comprising a sapphire substrate, an InGaAIN multilayer structure formed on the sapphire substrate, the InGaAIN multilayer structure including an N-type GaN layer, an active layer, and a P-type GaN layer from bottom to top An Ag layer formed on the P-type GaW layer to remove the edge of the device, and a protective metal layer formed on the surface of the Ag layer is etched in a portion of the surface of the protective metal layer until the N-electrode hole formed by the N-type GaN layer is exposed. a metal N electrode formed in the N electrode hole, a passivation layer formed on the protective metal layer, a passivation layer formed between the sidewall of the N electrode hole and the metal N electrode, wherein: the semiconductor light emitting The device also includes a metal reflective layer formed on the edge of the device, the metal reflective layer at the edge of the device being between the P-type GaN layer and the protective metal layer covering the edge regions from which the Ag layer is removed.

2. The semiconductor light emitting device according to claim 1, wherein: the semiconductor light emitting device further comprises a metal reflective layer formed on an edge of the N electrode hole, and a metal reflective layer at an edge of the N electrode hole is located at an edge of the N electrode hole Between the P-type GaN layer and the protective metal layer.

The semiconductor light emitting device according to claim 1 or 2, wherein the material of the metal reflective layer is Al.

The semiconductor light emitting device according to claim 1 or 2, wherein the material of the protective metal layer is a Ti/W alloy.

The semiconductor light emitting device according to claim 1 or 2, wherein the semiconductor light emitting device has a plurality of N electrode holes arranged in an array.

The semiconductor light emitting device according to claim 1 or 2, wherein the shape of the N electrode hole is one or more of a circular shape, a quadrangular shape, and a hexagonal shape.

7. A method of fabricating a semiconductor light emitting device, comprising the steps of: Claim

An InGaAIN multilayer structure is prepared on a sapphire substrate, the InGaAIN multilayer structure including an N-type GaN layer, an active layer, and a P-type GaN layer from bottom to top;

Forming an Ag layer on the P-type GaN layer;

Removing the Ag layer at the edge of the device;

Forming a metal reflective layer at the edge of the device;

Preparing a protective metal layer on the surface of the Ag layer;

Etching to a portion of the surface of the protective metal layer until an N-type GaN layer is exposed to form an N-electrode hole; a passivation layer is formed on the surface of the protective metal layer, the surface of the reflective metal layer and the inner sidewall of the N-electrode hole; and the metal N is prepared in the N-electrode hole electrode.

8. The method of fabricating a semiconductor light emitting device according to claim 8, wherein: the method of fabricating a semiconductor light emitting device further comprises preparing a metal reflective layer at an edge of the N electrode hole.

The method of producing a semiconductor light emitting device according to claim 7 or 8, wherein the material of the metal reflective layer is Al.

The method of producing a semiconductor light emitting device according to claim 7 or 8, wherein the metal reflective layer forming process is evaporation or sputtering.

The method of fabricating a semiconductor light emitting device according to claim 7 or 8, wherein the forming the N electrode hole comprises: etching a portion of the surface of the Ag layer to expose the P-type GaN layer to form a hole; Depositing a protective metal layer in the hole and on the surface of the Ag layer; etching the protective metal layer in the hole to expose the P-type GaN layer, and leaving a protective metal layer on the sidewall of the Ag layer; using ICP dry etching in the hole to The N-type GaN layer is exposed to form an N-electrode hole.

The method of fabricating a semiconductor light emitting device according to claim 7 or 8, wherein: The process of forming an N-electrode hole includes etching a portion of a surface of the Ag layer to expose a P-type GaN layer to form a hole; depositing a protective metal layer in the hole and the surface of the Ag layer; using ICP dry etching to expose N A GaN layer is formed, and a protective metal layer is left on the sidewall of the Ag layer to form an N electrode hole. The method of fabricating a semiconductor light emitting device according to claim 7 or 8, wherein: the method of fabricating a semiconductor light emitting device further comprises: preparing a P electrode and an N electrode, flipping the device onto the substrate, and then using a laser The stripping method removes the sapphire substrate.