WO2014098221A1 - Converter, and bidirectional converter - Google Patents

Converter, and bidirectional converter Download PDF

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Publication number
WO2014098221A1
WO2014098221A1 PCT/JP2013/084262 JP2013084262W WO2014098221A1 WO 2014098221 A1 WO2014098221 A1 WO 2014098221A1 JP 2013084262 W JP2013084262 W JP 2013084262W WO 2014098221 A1 WO2014098221 A1 WO 2014098221A1
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Prior art keywords
circuit
parallel
capacitor
switching element
leg
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PCT/JP2013/084262
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French (fr)
Japanese (ja)
Inventor
基久 人見
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オリジン電気株式会社
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Publication of WO2014098221A1 publication Critical patent/WO2014098221A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/33569Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements
    • H02M3/33576Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only having several active switching elements having at least one active switching element at the secondary side of an isolation transformer
    • H02M3/33584Bidirectional converters
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00Details of apparatus for conversion
    • H02M1/0048Circuits or arrangements for reducing losses
    • H02M1/0054Transistor switching losses
    • H02M1/0058Transistor switching losses by employing soft switching techniques, i.e. commutation of transistors when applied voltage is zero or when current flow is zero
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02BCLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

Definitions

  • the present invention relates to a converter and a bidirectional converter.
  • a transformer for insulating an input side and an output side is used for a DC-DC converter. Further, the input DC voltage can be stepped up or stepped down according to the turn ratio between the input side and the output side of the transformer.
  • a DC-DC converter that generates a high-frequency AC voltage rectangular wave, boosts it with a transformer, and performs full-wave rectification (see, for example, Patent Document 1).
  • an input DC voltage is converted to AC by duty ratio control of an inverter, and the obtained AC is transformed by a transformer and rectified to output a DC voltage (see, for example, Patent Document 2).
  • FIGS. 1 and 11 of Japanese Patent Application No. 2012-223133 examples of converters and bidirectional converters that can deal with a wide range of input / output voltage currents and that reduce switching loss are shown in FIGS. 1 and 11 of Japanese Patent Application No. 2012-223133, which is an earlier application of the present applicant.
  • this converter and the bidirectional converter for example, when the energy input from the first terminal T1 and the second terminal T2 side is supplied to the third terminal T3 and the fourth terminal T4 side, the two operations are switched. Can be used for a wide range of input / output voltage and current.
  • the first of the two operations described above is performed while the switching elements S1 and S4 or S2 and S3 of the first circuit 1 that are paired are on while the switching elements S6 and S5 of the second circuit 2 are on. And the secondary winding 11b is short-circuited to store energy in the inductance means L, and then the switching element S6 or S5 is turned off to transfer the energy stored in the inductance means L to the third terminal T3 and the fourth terminal. Supply to the T4 side.
  • the bridge connection circuit of the second circuit 2 is caused to function as a full-bridge rectifier circuit.
  • the bridge connection circuit of the second circuit 2 on the output side is operated so as to function as a full-bridge rectifier circuit, for example, when the load is light
  • the first If the ratio of the time during which both of the switching elements S1 and S4 constituting the set of the circuit 1 are on is reduced, the current flowing through the switching element S1 after the switching element S4 is turned off may oscillate. is there. This is because it is affected by the resonance operation by the capacitor on the secondary winding 11b side of the transformer 11 and the inductance means L. In this case, the switching element S2 to be turned off later can be turned off after the switching element S2 to be turned on next is lowered to the zero voltage and then turned on, and switching loss may occur.
  • an object of the present invention is to provide a converter and a bidirectional converter with reduced switching loss.
  • the converter according to the present invention includes a transformer having a primary winding and a secondary winding, a switching element having a switching element in which an antiparallel diode and a parallel capacitor are respectively connected in parallel, as upper and lower arms, and a first terminal.
  • At least two of the unidirectional elements to be connected include a bridge connection circuit in which switching elements including switch elements each having a parallel capacitor connected in parallel are connected in parallel, and at least in the bridge connection circuit A second circuit connected to the secondary winding side, and a connection point side of the upper and lower arms of the first leg, each having a third capacitor and a fourth capacitor connected in parallel to the two switching elements.
  • the switching element of the upper arm and the switching element of the lower arm of the second or first leg are turned on and off alternately to convert the direct current input from the first and second terminal sides into alternating current, and
  • the switching elements that are output from the first circuit are alternately turned on / off, the switching elements of the upper arm of the first or second leg that are in the on state and the second or first leg
  • the switching element in which the exciting current of the transformer is turned off later from the primary winding after the switching element connected to the first or second capacitor in parallel among the switching elements of the lower arm is turned off first
  • the switch element in which the third or fourth capacitor of the second circuit is connected in parallel is made to conduct in the
  • the converter and bidirectional converter of the present invention can reduce switching loss.
  • FIG. 4 is a waveform diagram showing an example of voltages and currents of switching elements S1 to S4 of the first circuit 1 in the converter according to the first embodiment of the present invention.
  • FIG. 4 is a waveform diagram showing an example of voltages and currents of switching elements S5 and S6 of the second circuit 2 and voltages and currents of unidirectional elements D7 and D8 in the converter according to the first embodiment of the present invention.
  • FIG. It is a circuit diagram formed at each timing in the converter according to the first embodiment of the present invention. It is a block diagram of the bidirectional
  • FIG. 1 is an explanatory diagram of a converter according to the first embodiment of the present invention
  • FIG. 1 (a) is a configuration diagram of the converter according to the first embodiment of the present invention
  • FIG. 1 (b) is the present invention. It is explanatory drawing of the drive timing of the switching element of the converter which concerns on 1st Embodiment.
  • the converter includes a transformer 11, a first circuit 1 connected to the primary winding 11a side of the transformer 11, and a second circuit connected to the secondary winding 11b side of the transformer 11. 2 circuit 2, inductance means L, and control circuit 3.
  • This converter converts the direct current input from the first terminal T1 and the second terminal T2 side into alternating current and outputs it from the first circuit 1, and converts the alternating current into direct current in the second circuit 2 via the transformer 11. Electric power is supplied to the third terminal T3 and the fourth terminal T4 side on the output side.
  • DC power from an external power supply is input to the first terminal T1 and the second terminal T2.
  • a capacitor 16 is connected between the first terminal T1 and the second terminal T2, and becomes a DC voltage.
  • the first circuit 1 is connected between the first terminal T1 and the second terminal T2, and the first circuit 1 is a full bridge in which upper and lower arms of the first leg 12 and the second leg 13 are configured by switching elements S1 to S4. It becomes the circuit of.
  • the first leg 12 and the second leg 13 of the first circuit 1 are respectively connected in parallel between the first terminal T1 and the second terminal T2.
  • the first leg 12 has switching elements S1 and S2 as upper and lower arms
  • the second leg 13 has switching elements S3 and S4 as upper and lower arms.
  • switching elements S1 to S4 include switching elements Q1 to Q4 including antiparallel diodes D1 to D4 and parallel capacitors C1 to C4, respectively. That is, the antiparallel diodes D1 to D4 are internal diodes of the switching elements S1 to S4, and the parallel capacitors C1 to C4 are parasitic capacitances of the switching elements S1 to S4.
  • the anti-parallel diodes D1 to D4 connected in parallel to the switching elements Q1 to Q4 may use the built-in diodes of the switching elements S1 to S4 as shown in FIG.
  • An external diode may be used separately from the switching elements S1 to S4, or a combination thereof may be used.
  • the parallel capacitors C1 to C4 connected in parallel to the switching elements Q1 to Q4 may use the parasitic capacitances of the switching elements S1 to S4 as shown in FIG.
  • an externally attached capacitor may be used, or a combination thereof may be used.
  • the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S1 and S4 or the switching elements S2 and S3 of the first circuit 1 to be turned off first.
  • the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S3 and S4 of the upper and lower arms of the second leg 13 that are turned off first.
  • the second circuit 2 includes a bridge connection circuit including unidirectional elements D7 and D8 and two switching elements S5 and S6, and a third capacitor Cc connected in parallel to the two switching elements S5 and S6, respectively. And a fourth capacitor Cd, and is connected to the secondary winding 11b side of the transformer 11.
  • the switching elements S5 and S6 include unidirectional elements D5 and D6 and parallel capacitors C5 and C6 connected as parallel capacitors to the switching elements Q5 and Q6, respectively. .
  • a series circuit of switching elements S5 and S6 in which unidirectional elements D5 and D6 are connected in series with the same polarity, and a series circuit of unidirectional elements D7 and D8 connected in series with the same polarity, are connected in parallel between the third terminal T3 and the fourth terminal T4, respectively.
  • switching elements S5 and S6 in which antiparallel diodes D5 and D6 and parallel capacitors C5 and C6 are connected in parallel to switching elements Q5 and Q6, respectively, are used. That is, the unidirectional elements D5 and D6 are internal diodes of the switching elements S5 and S6, and the parallel capacitors C5 and C6 are parasitic capacitances of the switching elements S5 and S6.
  • the unidirectional elements D5 and D6 may use the built-in diodes of the switching elements S5 and S6 as shown in FIG. 1A, and are externally attached separately from the switching elements S5 and S6. Diodes may be used, or a combination thereof.
  • the parallel capacitors C5 and C6 may use the parasitic capacitances of the switching elements S5 and S6 as shown in FIG. 1A, and use capacitors externally attached separately from the switching elements S5 and S6. Or a combination thereof.
  • connection point side where the unidirectional elements D5, D6 are connected in series with the same polarity and the other connection where the unidirectional elements D7, D8 are connected in series with the same polarity
  • the secondary winding 11b of the transformer 11 is connected to the point side.
  • a capacitor 17 is connected between the third terminal T3 and the fourth terminal T4, and a DC voltage is output between the third terminal T3 and the fourth terminal T4.
  • the inductance means L is connected to the connection point side of the upper and lower arms of the first leg 12 and the connection point side of the upper and lower arms of the second leg 13 via the primary winding 11 a of the transformer 11.
  • the unidirectional elements D5 and D6 are connected in series with the same polarity in the bridge connection circuit of the second circuit 2, and the unidirectional elements D7 and D8 are connected in series with the same polarity.
  • the other connection point side may be connected via the secondary winding 11b of the transformer 11.
  • one end of the inductance means L is connected to the connection point side of the upper and lower arms of the first leg 12, and the other end is connected to the primary winding 11a side of the transformer 11.
  • One end may be connected to the connection point side of the upper and lower arms of the second leg 13, and the other end may be connected to the primary winding 11 a side of the transformer 11.
  • the control circuit 3 gives drive signals to the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2, respectively, and performs on / off control of each switching element.
  • the switching element S1 or S3 of the upper arm of the first leg 12 or the second leg 13 and the switching element S4 or S2 of the lower arm of the second leg 13 or the first leg 12 are respectively one. Turns on and off alternately in pairs. For example, among the switching elements S1 and S4 of the first circuit 1 to be paired, the switching element S4 to which the second capacitor Cb is connected in parallel is turned off first, and then the switching element S1 is turned off later. . Similarly, among the switching elements S2 and S3 of the first circuit 1 which is the other set, the switching element S3 to which the first capacitor Ca is connected in parallel is turned off first, and then the switching element S2 is turned on later. To turn off.
  • control circuit 3 sets the switching element S4 or S3 to be turned off first even when the ratio of the time when both of the switching elements S1 and S4 or S2 and S3 that are the set of the first circuit 1 are on is small.
  • the switching element S5 or S6 of the second circuit 2 is made conductive. Then, the switching element S5 or S6 of the second circuit 2 that is turned on before turning off the switching element S1 or S2 to be turned off later is turned off.
  • control circuit 3 performs on / off control of the switching elements S5 and S6 of the second circuit 2 during the period in which the switching elements S1 and S4 or S2 and S3 of the pair of the first circuit 1 are simultaneously turned on.
  • a wide range of input / output voltage currents can be handled by switching between the operation of causing the two circuits to function as a rectifier circuit and the operation of causing the secondary winding 11b to be in a short circuit state.
  • the switching element S5 or S6 of the second circuit 2 is switched on during the period when the switching elements S1 and S4 or S2 and S3 are simultaneously turned on.
  • the power input from the first terminal T1 and the second terminal T2 side without conducting in the forward direction is supplied from the inductance means L via the unidirectional elements D5 and D8 or D6 and D7 to the third terminal T3 and the fourth terminal. Supply to the T4 side.
  • the switching element S1 and S4 or the switching element S6 or S5 of the second circuit 2 is turned on during the period in which the switching elements S1 and S4 or S2 and S3 are simultaneously turned on.
  • the power input from the second terminal T2 side is temporarily stored in the inductance means L and then turned off, and the energy stored in the inductance means L is supplied to the third terminal T3, the fourth through the unidirectional elements D5, D8. Supply to the terminal T4 side.
  • the output voltage detection means 18 of the second circuit 2 shown in FIG. 1A detects the output voltage of the second circuit 2 output between the third terminal T3 and the fourth terminal T4. This output voltage detection value is input to the control circuit 3.
  • the control circuit 3 controls the output voltage of the second circuit 2 by turning on and off the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2 based on the output voltage detection value. For example, the control circuit 3 performs pulse control for modulating the pulse width, frequency, and the like of the switching elements S1 to S4 of the first circuit 1 so that the output voltage detection value approaches the target voltage value according to the load condition.
  • the output voltage detection means 18 of the second circuit 2 connects a resistor on the output side, for example, and detects the voltage applied to this resistor.
  • the drive signal will be described in the following operation with the drive signal for turning on the switching element of the first circuit 1 and the switching element of the second circuit 2 being an on signal and the drive signal for turning off the off signal.
  • the drive signal voltage, current, or the like is used.
  • the on signal, the off signal, and the like are not particularly limited, and may be a signal that is given throughout the on or off period or a signal that is given as a trigger for a short time.
  • FIG. 1B is a waveform diagram showing an example of drive signals for the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2 in the converter according to the first embodiment of the present invention. is there.
  • FIG. 1B it is assumed that an ON signal is given to the switching elements S1 and S4 of the first circuit 1 that are paired at time t1, and an ON signal of the switching element S5 is given between times t1 and t2. .
  • the ON signal of the switching element S5 is given between times t1 and t2.
  • the switching element Q5 is moved forward. It is only necessary that the ON signal is given at the time point t3 when the connection is made.
  • FIG. 2 is a waveform diagram showing an example of voltages and currents of the switching elements S1 to S4 of the first circuit 1 in the converter according to the first embodiment of the present invention
  • FIG. 3 is a waveform diagram showing the first embodiment of the present invention. It is a wave form diagram showing an example of voltage and current of switching elements S5 and S6 of the 2nd circuit 2, and voltage and current of unidirectional elements D7 and D8 in a converter concerning a form.
  • FIG. 4 is a circuit diagram formed at each operation timing in the converter according to the first embodiment of the present invention.
  • the current flowing in the forward direction through the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2 is positive
  • the current flowing in the reverse direction through the switching elements S1 to S4 and the switching elements S5 and S6 in the second circuit 2 and the current flowing in the forward direction through the unidirectional elements D7 and D8 are negative.
  • the current of the switching element S1 and the current of the switching element S4 are on the negative side, that is, the diodes D1 and D4, but then the positive side, that is, the switching elements Q1 and Q4 are forward. Conducted to.
  • FIG. 4 (a) shows the flow of current when the switch elements Q1 and Q4 after the time t1 are conducting in the forward direction.
  • current flows through the switching elements Q1 and Q4, and on the secondary winding 11b side, current flows through the unidirectional elements D5 and D8.
  • Input power supplied from the first terminal T1 and the second terminal T2 side is supplied to the third terminal T3 and the fourth terminal T4 side via the inductance means L.
  • the control circuit 3 is paired so that the voltage detection value between the third terminal T3 and the fourth terminal T4 detected by the output voltage detection means 18 of the second circuit 2 approaches the target value.
  • An off signal is given to switching element S4 which turns off first among switching elements S1 and S4 of the 1st circuit 1.
  • FIG. 2 the switch element Q4 is turned off with a relatively large current value.
  • the switch element Q4 is turned off at time t2, as shown in FIG. 4B, on the primary winding 11a side, the parallel capacitor C4 and the second capacitor Cb connected in parallel to the turned off switch element Q4 are charged. A current flows in the direction through the switch element Q1.
  • the antiparallel diode D3 connected in parallel to the switch element Q3 is turned on.
  • the primary winding 11a side the primary winding 11a and the primary winding 11a are arranged in the same direction as the current flowing in the primary winding 11a and the inductance means L immediately before by the energy accumulated in the inductance means L and the exciting current of the transformer 11.
  • the current on the secondary winding 11b side continues to flow in the forward direction through the unidirectional elements D5 and D8 from time t1, but when the forward conduction in the unidirectional element D5 ends at time t3, the switch element Start to flow forward in Q5.
  • the ON signal of the switching element S5 is given to the unidirectional element D5 at the time t3 when the forward conduction ends so that the current flowing through the primary-side circulation path does not vibrate.
  • the exciting current of the transformer 11 flows through the switch element Q5 and the unidirectional element D7 on the secondary winding 11b side. For this reason, the exciting current of the transformer 11 is shunted to the primary circulation path on the primary winding 11a side and the secondary winding 11b side.
  • the exciting current of the transformer 11 is also shunted to the secondary winding 11b side, the current flowing through the primary side circulation path becomes very small as shown by the currents of the switching elements S1 and S3 in FIG. If the switching element S1 to be turned off later in this state is turned off, zero voltage switching may not be realized when the other switching element S2 of the same leg 12 as the switching element S1 is turned on. After the switching element S1 is turned off, the capacitor C1 is charged by the exciting current of the transformer 11, and the switching element S2 is turned on in the zero voltage state unless the capacitor C2 of the switching element S2 to be turned on is discharged to zero voltage. It is because it cannot be made.
  • the switching element S5 in the conductive state is turned off, and the capacitors on the secondary winding 11b side, that is, the capacitor C5, the third capacitor Cc, and the capacitor C6.
  • the current flowing through the primary-side circulation path during charging and discharging of the capacitors C1 and C2 is increased by utilizing the resonance operation of the combined capacitance of the fourth capacitor Cd and the inductor L.
  • the drive signal for the switching element S5 is turned off at time t4.
  • a current for charging the capacitor C5 and the third capacitor Cc and discharging the capacitor C6 and the fourth capacitor Cd flows, and the switching of FIG.
  • the voltage and current waveforms of the elements S5 and S6 are waveforms that reflect the resonant operation of the inductance means and the secondary side capacitor.
  • the resonance current on the secondary winding side 11 b is superimposed on the current flowing through the primary side circulation path on the primary winding 11 a side via the transformer 11. As shown in FIG.
  • a current continuously flows in the primary circulation path on the primary winding 11a side, and the current waveform of the switching element S1 in FIG. 2 is the exciting current value of the transformer 11 until time t4.
  • the current value increased after time t4. That is, a current larger than the excitation current caused by the superposition due to the resonance effect of the combined capacitance of the capacitor on the secondary winding 11b side and the inductance means L flows through the primary side circulation path.
  • the switching element S1 to be turned off later is turned off at the time t5
  • the switching element S1 to be turned off later is turned off, as shown in FIG. 4E, on the primary winding 11a side, the capacitor C1 is connected via the diode D3.
  • a current for charging / discharging C2 flows. Since the current flowing in the primary circulation path at time t5 is made large enough to charge and discharge the capacitors C1 and C2 using the above resonance operation, the voltage of the switching element S2 in FIG. The waveform has dropped to almost zero volts after time t5.
  • the period from time t4 to t5 from the start of the resonance operation of the combined capacitance of the capacitor on the secondary winding 11b side and the inductance means L to the time when the switching element S1 is turned off is the resonance one in the resonance operation described above.
  • the time is within 1/2 of the cycle.
  • the current obtained by superimposing the resonance current on the excitation current flowing through the primary side circulation path rises up to 1/2 of one resonance cycle after the start of resonance operation, and reaches a peak value at 1/2 of one resonance cycle. It is because it decreases after that.
  • the capacitor C5 and the third capacitor Cc are discharged, and a current that charges the capacitor C6 and the fourth capacitor Cd flows.
  • the antiparallel diode D2 becomes conductive as shown in FIG.
  • a current flows from the primary winding 11a through the antiparallel diodes D3 and D2 in the same direction as the current flowing in the primary winding 11a immediately before time t6.
  • the capacitor C5, the third capacitor Cc, the capacitor C6, the fourth capacitor Cd, and the inductor L are recharged to recharge the capacitor C5 and the third capacitor Cc. A current that discharges C6 and the fourth capacitor Cd flows.
  • the current on the secondary winding 11b side is discharged from the capacitor C5 and the third capacitor Cc shown in FIG. It may be in a state where a current for charging the capacitor Cd is flowing.
  • FIG. 4G shows an operation in which the current on the primary winding 11a side flows through the switch elements Q2 and Q3. At this time, the current on the secondary winding 11b side flows through the unidirectional elements D6 and D7.
  • the power input from between the first terminal T1 and the second terminal T2 is supplied to the third terminal T3 and the fourth terminal T4 side via the inductance means L.
  • the switching elements S2 and S3 realize zero voltage switching when turned on. As described above, even when the excitation current flowing through the primary side circulation path is small, by increasing the current flowing through the primary side circulation path using the resonance operation, the switching element that is turned off later is turned on. Zero voltage switching can be realized.
  • the control circuit 3 includes a first capacitor Ca connected in parallel among the pair of switching elements S2 and S3 so that the output voltage between the third terminal T3 and the fourth terminal T4 has a desired value.
  • the switch element Q3 is turned off first.
  • the switch element Q6 is turned on, and the switch element Q6 is turned off in a state where the exciting current of the transformer 11 is shunted to the primary and secondary windings 11a and 11b.
  • Switch element that turns off the current flowing in the primary-side circulation path in a state in which the current flowing through the primary-side circulation path is increased by utilizing the resonance operation of the combined capacitance of the capacitor on the secondary winding 11b side after the switch element Q6 is turned off and the inductance means L Turn off Q2.
  • synchronous rectification may be performed by giving an ON signal to the switching element S5 during a period in which the unidirectional element D5 of the second circuit 2 conducts in the forward direction.
  • the voltage drop of the switch element S5 during reverse conduction is smaller than the voltage drop during forward conduction of the unidirectional element D5
  • conduction loss can be reduced by conducting the switch element Q5 in the reverse direction. it can.
  • the diodes are shown as the unidirectional elements D7 and D8 of the second circuit 2.
  • the present invention is not limited to this example, and any element that conducts current in one direction may be used. .
  • switching elements S7 and S8 having the unidirectional elements D7 and D8 attached externally or having internal diodes D7 and D8 may be used.
  • the switch elements Q7 and Q8 having a small voltage drop during reverse conduction during the period in which the unidirectional elements D7 and D8 conduct in the forward direction are conducted by conducting in the reverse direction. Loss can be reduced.
  • the parallel capacitors C1 and C2 having the capacitances of the capacitors connected in parallel to the switch elements Q1 and Q2 to be turned off later have a small capacitance value such as a parasitic capacitance built in the switching elements S1 and S2, and may vary depending on parts. .
  • a separate capacitor may be connected in parallel to the parasitic capacitances built in the switching elements S1 and S2, and these combined capacitances may be used as the parallel capacitors C1 and C2.
  • an ON signal that is a drive signal for the switching elements S2 and S3 of the first circuit 1 is simultaneously applied, and thereafter, the switching element Q2 and the switching element Q3.
  • the time t7 when the ON signals of the switching elements S2 and S3 are applied may be a period in which the antiparallel diodes D2 and D3 are conductive.
  • the time point at which the ON signals of the switching elements S2 and S3 are applied may coincide with the time point at which the switch element Q2 and the switch element Q3 start to conduct in the forward direction at time t7.
  • the switching elements S4 and S3 of the upper and lower arms of the second leg 13 among the switching elements S1 and S4, S2 and S3 of the first circuit 1 to be paired are turned off first.
  • the switching elements S1 and S2 of the upper and lower arms of the first leg 12 may be turned off first.
  • the first capacitor Ca and the second capacitor Cb are respectively connected to the switching elements S1 and S2 that are turned off first.
  • the switching elements of the first circuit 1 to be turned off first are the switching elements S1 and S3 of the upper arms of the first leg 12 and the second leg 13, or the lower arms of the first leg 12 and the second leg 13.
  • the switching elements S2 and S4 may be used.
  • the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S1 and S3 or the switching elements S2 and S4 that are turned off first.
  • the position of the unidirectional elements D7 and D8 with the series circuit may be switched.
  • the third capacitor Cc and the fourth capacitor Cd are respectively connected in parallel to the switching elements S5 and S6 of the second circuit 2 to be turned on / off.
  • a circuit configuration of a mixed bridge connection that connects a series circuit of the unidirectional element D7 or D8 and the switching element S5 or S6 of the second circuit 2 between the third terminal T3 and the fourth terminal T4, respectively. It may be.
  • the third capacitor Cc and the fourth capacitor Cd are connected in parallel to the switching elements S5 and S6 of the second circuit 2 to be turned on / off, respectively.
  • FIG. 5 shows an electric circuit diagram of the bidirectional converter according to the second embodiment of the present invention.
  • components having the same reference numerals as those of the converter according to the first embodiment indicate the same components.
  • the configuration and operation different from those of the converter according to the first embodiment will be mainly described.
  • the second circuit is configured in the same manner as the first circuit in order to operate in both directions.
  • the second circuit 22 has a circuit structure in which the switching elements are upper and lower arms of two legs.
  • the control circuit 23 is used here.
  • the first leg 12, the second leg 13 and the third leg 14 of the second circuit 22 of the first circuit 1 are the same as the configuration shown in FIG. 1 described in the first embodiment.
  • the inductance means L is connected to the primary winding 11a side, but may be connected to the secondary winding 11b side.
  • the upper and lower arms of one leg that is turned off first here the switching elements S3 of the upper and lower arms of the first leg 12, S4 is connected in series.
  • First and second capacitors Ca and Cb are connected in parallel to the switching elements S3 and S4 of the first circuit 1 to be turned off first.
  • the third leg 24 and the fourth leg 25 of the second circuit 22 are respectively connected in parallel between the third terminal T3 and the fourth terminal T4.
  • the third leg 24 and the fourth leg 25 are full-bridge connection circuits in which the upper and lower arms are configured by the switching elements S5 to S8.
  • the switching elements S5 to S8 are connected in parallel with switching elements Q5 to Q8, unidirectional elements D5 to D8, and parallel capacitors C5 to C8, respectively.
  • the unidirectional elements D5 to D8 may use the built-in diodes of the switching elements S5 to S8 of the second circuit 22 as shown in FIG.
  • an externally attached diode may be used, or a combination thereof may be used.
  • the parallel capacitors C5 to C8 may use the parasitic capacitances of the switching elements S5 to S8 of the second circuit 22 as shown in FIG. 5, and are separated from the switching elements S5 to S8 of the second circuit 22.
  • An attached capacitor may be used, or a combination thereof.
  • the control circuit 23 When supplying power from the first circuit 1 to the second circuit 22 side, the same operation as described in the first embodiment is performed.
  • the control circuit 23 When power is supplied from the second circuit 22 to the first circuit 1 side, the control circuit 23 includes the third and fourth capacitors among the switching elements S5 and S8 and S6 and S7 that form a pair in the second circuit 22.
  • the switching elements S5 and S6 to which Cc and Cd are respectively connected in parallel are turned off first.
  • the switching that is turned off first among the switching elements that are the set of the second circuit 22 After the element S5 or S6 is turned off, the switching element S4 or S3 while the exciting current of the transformer 11 flows through the secondary circulation path having the secondary winding 11b and the switching element S8 or S7 to be turned off later. In the forward direction. Then, before turning off the switching element S8 or S7 to be turned off later, the switching element S4 or S3 is turned off to turn off the capacitor C3 on the primary winding 11a side, the first capacitor Ca, the capacitor C4, and the second capacitor.
  • the current flowing through the secondary-side circulation path when charging and discharging the capacitors C7 and C8 is increased.
  • the parallel capacitor C8 or C7 can be discharged until it reaches zero voltage, so that zero voltage switching of the switching element S8 or S7 that is turned off later can be realized.
  • the switching elements S5, S6 are in a period in which the unidirectional elements (antiparallel diodes) D5, D6 or the antiparallel diodes D3, D4 of the second circuit 22 or the first circuit 1 are forward-conductive.
  • synchronous rectification may be performed by giving an ON signal to S3 and S4.
  • the voltage drop of the switch elements Q5 and Q6 during reverse conduction is smaller than the voltage drop during forward conduction of the unidirectional elements D5 and D6, so that by switching the switch elements Q5 and Q6 in the reverse direction, The conduction loss can be reduced.
  • the switching elements S7 and S8 of the second circuit 22 or the switching elements S1 and S2 of the first circuit 1 have the unidirectional elements (antiparallel diodes) D7 and D8 or the antiparallel diodes D1 and D2 in the forward direction.
  • the conduction loss can be reduced by conducting the switch elements Q7, Q8 or Q1, Q2 having a small voltage drop during reverse conduction during the conduction period in the reverse direction.
  • the current when the switching elements S1 and S2 of the first circuit 1 or the switching elements S7 and S8 of the second circuit 22 to be turned off later is turned off is used as the capacitor of the second circuit or the first circuit.
  • the zero voltage switching is realized for the switching elements S1 and S2 of the first circuit 1 or the switching elements S7 and S8 of the second circuit 22 to be turned off later by increasing the resonance by the resonance operation of the capacitor and the inductance means L. The resulting switching loss is reduced.
  • the control circuits 3 and 23 modulate the pulse width and frequency of the switching element of the first circuit 1 or the second circuit 22, and the second circuit 22 or the second circuit on the output side.
  • the capacitance of the capacitor that is connected in parallel to the switch element that is turned off first is the capacitance of the capacitor that is connected in parallel to the switch element that is turned off later. By making it larger than the capacitance, it is possible to reduce the switching loss that occurs when the switching element of the first circuit or the second circuit is turned off.
  • the switching loss generated at the time of OFF can be reduced by connecting a capacitor in parallel with the switching element of the output-side second circuit or the first circuit to be turned ON / OFF.
  • the period Td during which both the switching elements S1 and S2 of the first circuit 1 are turned off is set to a large value, the voltage rises again after the voltage across the switching element S1 or S2 drops to zero, that is, the capacitor C1. Or it may be charged after C2 is discharged to zero. For this reason, it is preferable that the period Td during which both the switching elements S1 and S2 are turned off is set to a period during which the voltage across the switching element S1 or S2 drops to zero. The same applies to the switching elements S7 and S8 of the second circuit 22.
  • the parallel capacitors C1 and C2 having the capacitance of the capacitors connected in parallel to the switch elements Q1 and Q2 to be turned off later have a small capacitance value such as in the case of the parasitic capacitance built in the switching elements S1 and S2 of the first circuit 1, There are variations. For this reason, a separate capacitor may be connected in parallel to the parasitic capacitances built in the switching elements S1 and S2 of the first circuit 1, and these combined capacitors may be used as the parallel capacitors C1 and C2. The same applies to the parallel capacitors C7 and C8 of the second circuit 22.
  • an inductance component provided in parallel with the primary winding or the secondary winding of the transformer 11 in order to make the excitation current have an appropriate magnitude is also included in the excitation inductance of the transformer 11 described above.
  • the current that flows due to the combined inductance of the exciting inductance of the transformer 11 and the inductance component provided in parallel with the transformer 11 is also included in the above-described exciting current.
  • the excitation inductance of the transformer 11 can be adjusted in the transformer structure by, for example, the gap width of the core, the number of windings, the core material, and the like.
  • control circuits 3 and 23 allow the voltage values detected by the output voltage detection means 18 of the second circuit and the output voltage detection means 19 of the first circuit to approach the target values.
  • the detection value to be used may be a combination of these in addition to the output current value and the output power.
  • the detected value of voltage, current, or power on the input side may approach the target value.
  • a calculated value obtained by multiplying the detected voltage and current is used as the detected power value.
  • the above output voltage, current or power detection value or input voltage, current or power detection value is calculated by multiplying or dividing a certain coefficient by these values or adding or subtracting a certain value. The value obtained in this way is also included.
  • connection point means a part that is electrically connected and at the same potential, and does not mean a point that is physically connected.
  • the configuration, structure, number, arrangement, shape, material, and the like of each part in the converter and the bidirectional converter according to the present invention are not limited to the above-described specific examples, and those appropriately adopted by those skilled in the art are also included in the present invention. As long as the gist of the present invention is included, it is included in the scope of the present invention.
  • the semiconductor elements illustrated by symbols are not limited to these specific electric elements, but include an electric element including a single electric element or a plurality of electric elements having the same function or action. All of these variations are included within the scope of the present invention. Similarly, the number and arrangement of circuit elements including diodes, capacitors, and switching elements that are appropriately designed by those skilled in the art are included in the scope of the present invention.

Abstract

 Provided are a converter and a bidirectional converter in which switching losses are reduced. In this converter and bidirectional converter, when the percentage of time that both switching elements forming a set in a first or second circuit (1, 2, 22) are on is low, after one switching element (S4 or S5) among the conducting set of switching elements (S1 and S4 or S5 and S8) of the second or first circuit (2, 22, 1) has been switched off in advance, the switching element (S5, S4) of the second or first circuit (2, 22, 1) is allowed to conduct in the forward direction and then switched off while an excitation current from a transistor (11) flows in a primary or secondary side circulation path, and zero-voltage switching of the switching elements (S2 and S1 or S8 and S7) that are subsequently switched off is implemented by the flow of current through the primary or secondary side circulation path, the current being larger than the excitation current as a result of being superimposed with the influence of the resonance effect from a secondary or primary side capacitor and an inductance means.

Description

コンバータ及び双方向コンバータConverter and bidirectional converter
 本発明は、コンバータ及び双方向コンバータに関する。 The present invention relates to a converter and a bidirectional converter.
 一般的にDC-DCコンバータには、入力側と出力側を絶縁するためのトランスが用いられる。また、このトランスの入力側と出力側との巻数比に応じて、入力される直流電圧を昇圧又は降圧して出力することができる。DC-DCコンバータとして、高周波交流電圧矩形波を発生させトランスで昇圧し全波整流するようにしたものがある(例えば、特許文献1参照)。また、入力された直流電圧をインバータのデューティー比制御によって交流にし、得られた交流をトランスで変圧し整流して直流電圧を出力するようにしたものがある(例えば、特許文献2参照)。 Generally, a transformer for insulating an input side and an output side is used for a DC-DC converter. Further, the input DC voltage can be stepped up or stepped down according to the turn ratio between the input side and the output side of the transformer. There is a DC-DC converter that generates a high-frequency AC voltage rectangular wave, boosts it with a transformer, and performs full-wave rectification (see, for example, Patent Document 1). In addition, there is a type in which an input DC voltage is converted to AC by duty ratio control of an inverter, and the obtained AC is transformed by a transformer and rectified to output a DC voltage (see, for example, Patent Document 2).
 さらには、広範囲な入出力電圧電流に対応でき、スイッチング損失を低減したコンバータ及び双方向コンバータとして、例えば、本出願人の先の出願である特願2012-223133の図1及び図11に示されるコンバータ及び双方向コンバータがある。このコンバータ及び双方向コンバータでは、例えば、第1端子T1及び第2端子T2側から入力されるエネルギーを第3端子T3及び第4端子T4側に電力を供給する場合に、2つの動作を切替えることで広範囲な入出力電圧電流に対応させることができる。上記の2つの動作のうちの1つ目の動作は、組となる第1回路1のスイッチング素子S1及びS4又はS2及びS3がオンしている間に、第2回路2のスイッチング素子S6又はS5を導通させて2次巻線11bを短絡状態にしてインダクタンス手段Lにエネルギーを蓄積させ、その後スイッチング素子S6又はS5をオフさせてインダクタンス手段Lに蓄積されたエネルギーを第3端子T3及び第4端子T4側に供給させる。2つ目の動作は、第2回路2のブリッジ接続回路をフルブリッジの整流回路として機能させている。 Furthermore, examples of converters and bidirectional converters that can deal with a wide range of input / output voltage currents and that reduce switching loss are shown in FIGS. 1 and 11 of Japanese Patent Application No. 2012-223133, which is an earlier application of the present applicant. There are converters and bidirectional converters. In this converter and the bidirectional converter, for example, when the energy input from the first terminal T1 and the second terminal T2 side is supplied to the third terminal T3 and the fourth terminal T4 side, the two operations are switched. Can be used for a wide range of input / output voltage and current. The first of the two operations described above is performed while the switching elements S1 and S4 or S2 and S3 of the first circuit 1 that are paired are on while the switching elements S6 and S5 of the second circuit 2 are on. And the secondary winding 11b is short-circuited to store energy in the inductance means L, and then the switching element S6 or S5 is turned off to transfer the energy stored in the inductance means L to the third terminal T3 and the fourth terminal. Supply to the T4 side. In the second operation, the bridge connection circuit of the second circuit 2 is caused to function as a full-bridge rectifier circuit.
 このコンバータ及び双方向コンバータでは、上記の2つの動作において、第1端子T1及び第2端子T2側から入力されるエネルギーを第3端子T3及び第4端子T4側に電力を供給する場合に、第1又は第2レグの上アームのスイッチング素子と前記第2又は第1レグの下アームのスイッチング素子とを組にして交互にオンオフさせる。このとき、組となるスイッチング素子のうち第1又は第2コンデンサが並列に接続された一方のスイッチング素子を先にオフさせてから、他方のスイッチング素子を後からオフさせている。 In this converter and the bidirectional converter, in the above two operations, when the energy input from the first terminal T1 and the second terminal T2 side is supplied to the third terminal T3 and the fourth terminal T4 side, The switching element of the upper arm of the first or second leg and the switching element of the lower arm of the second or first leg are turned on and off alternately. At this time, one switching element connected to the first or second capacitor in parallel is turned off first, and then the other switching element is turned off later.
特開2008-278723号公報JP 2008-278723 A 特開平11-187654号公報JP-A-11-187654
 しかし、上記のコンバータ及び双方向コンバータにおいて、出力側となる第2回路2のブリッジ接続回路をフルブリッジの整流回路として機能するように動作させている場合に、例えば、軽負荷時などに第1回路1の組となるスイッチング素子S1とS4とが共にオンしている時間の割合を小さくすると、先にスイッチング素子S4をオフさせた後にスイッチング素子S1を介して流れる電流が振動してしまうことがある。これは、トランス11の2次巻線11b側のコンデンサとインダクタンス手段Lによる共振動作の影響を受けるためである。この場合、後からオフさせるスイッチング素子S1のオフ後に次にオンさせるスイッチング素子S2をゼロ電圧まで下げてからオンさせるゼロ電圧スイッチングが実現できなくなり、スイッチング損失が生じてしまうことがある。 However, in the above-described converter and bidirectional converter, when the bridge connection circuit of the second circuit 2 on the output side is operated so as to function as a full-bridge rectifier circuit, for example, when the load is light, the first If the ratio of the time during which both of the switching elements S1 and S4 constituting the set of the circuit 1 are on is reduced, the current flowing through the switching element S1 after the switching element S4 is turned off may oscillate. is there. This is because it is affected by the resonance operation by the capacitor on the secondary winding 11b side of the transformer 11 and the inductance means L. In this case, the switching element S2 to be turned off later can be turned off after the switching element S2 to be turned on next is lowered to the zero voltage and then turned on, and switching loss may occur.
 そこで、本発明は、スイッチング損失を低減したコンバータ及び双方向コンバータを提供することを目的とする。 Therefore, an object of the present invention is to provide a converter and a bidirectional converter with reduced switching loss.
 本発明に係るコンバータは、1次巻線と2次巻線とを有するトランスと、逆並列ダイオードと並列コンデンサとがそれぞれ並列に接続されたスイッチ素子を有するスイッチング素子を上下アームとして第1端子と第2端子との間にそれぞれ並列に接続された第1レグと第2レグと、前記第1レグもしくは第2レグの上下アームの一方のスイッチング素子又は前記第1レグ及び第2レグの上アームもしくは下アームの一方のスイッチング素子に並列に接続される第1コンデンサと、前記第1レグもしくは第2レグの上下アームの他方のスイッチング素子又は前記第1レグ及び第2レグの上アームもしくは下アームの他方のスイッチング素子に並列に接続される第2コンデンサとを有し、前記1次巻線側に接続される第1回路と、ブリッジ接続される一方向性素子のうち少なくとも2つの前記一方向性素子は並列コンデンサがそれぞれ並列に接続されたスイッチ素子を含むスイッチング素子がそれぞれ並列に接続されるブリッジ接続回路と、前記ブリッジ接続回路内の少なくとも2つの前記スイッチング素子にそれぞれ並列に接続される第3コンデンサと第4コンデンサとを有し、前記2次巻線側に接続される第2回路と、前記第1レグの上下アームの接続点側と前記第2レグの上下アームの接続点側との間に前記1次巻線を介して又は前記ブリッジ接続回路内で前記一方向性素子同士が同じ極性で直列に接続される接続点側と前記一方向性素子同士が同じ極性で直列に接続される他方の接続点側との間に前記2次巻線を介して接続されるインダクタンス手段と、前記第1又は第2レグの上アームのスイッチング素子と前記第2又は第1レグの下アームのスイッチング素子とを組にして交互にオンオフさせて前記第1、第2端子側から入力される直流を交流に変換させて前記第1回路から出力させ、前記組となるスイッチング素子を交互にオンオフ制御するにあたり、オン状態にある前記組となる前記第1又は第2レグの上アームのスイッチング素子と前記第2又は第1レグの下アームのスイッチング素子のうち前記第1又は第2コンデンサが並列に接続されたスイッチング素子を先にオフさせた後、前記トランスの励磁電流が前記1次巻線と後からオフさせる前記スイッチング素子とを有する1次側循環経路に流れている間に前記第2回路の前記第3又は第4コンデンサが並列に接続されたスイッチ素子を順方向に導通させてからオフし、前記第3コンデンサとこれに並列に接続される前記並列コンデンサと前記第4コンデンサとこれに並列に接続される前記並列コンデンサと前記インダクタンス手段とによる共振作用の影響によって重畳されたことによる前記励磁電流よりも大きい電流を前記1次側循環経路に流す制御回路とを備えることを特徴とする。 The converter according to the present invention includes a transformer having a primary winding and a secondary winding, a switching element having a switching element in which an antiparallel diode and a parallel capacitor are respectively connected in parallel, as upper and lower arms, and a first terminal. A first leg and a second leg respectively connected in parallel with the second terminal; one switching element of the upper and lower arms of the first leg or the second leg; or the upper arm of the first leg and the second leg Alternatively, the first capacitor connected in parallel to one switching element of the lower arm and the other switching element of the upper and lower arms of the first leg or the second leg, or the upper arm or the lower arm of the first leg and the second leg A second capacitor connected in parallel to the other switching element of the first circuit, a first circuit connected to the primary winding side, and a bridge connection At least two of the unidirectional elements to be connected include a bridge connection circuit in which switching elements including switch elements each having a parallel capacitor connected in parallel are connected in parallel, and at least in the bridge connection circuit A second circuit connected to the secondary winding side, and a connection point side of the upper and lower arms of the first leg, each having a third capacitor and a fourth capacitor connected in parallel to the two switching elements. A connection point side in which the unidirectional elements are connected in series with the same polarity via the primary winding or in the bridge connection circuit between the upper leg and the connection point side of the upper and lower arms of the second leg Inductance means connected via the secondary winding between the other unidirectional elements connected in series with the same polarity in series; the first or second element; The switching element of the upper arm and the switching element of the lower arm of the second or first leg are turned on and off alternately to convert the direct current input from the first and second terminal sides into alternating current, and When the switching elements that are output from the first circuit are alternately turned on / off, the switching elements of the upper arm of the first or second leg that are in the on state and the second or first leg The switching element in which the exciting current of the transformer is turned off later from the primary winding after the switching element connected to the first or second capacitor in parallel among the switching elements of the lower arm is turned off first The switch element in which the third or fourth capacitor of the second circuit is connected in parallel is made to conduct in the forward direction while flowing in the primary side circulation path having The third capacitor, the parallel capacitor connected in parallel to the third capacitor, the fourth capacitor, the parallel capacitor connected in parallel to the third capacitor, and the inductance means are superimposed on each other. And a control circuit for flowing a current larger than the exciting current to the primary-side circulation path.
 本発明のコンバータ及び双方向コンバータは、スイッチング損失を低減することができる。 The converter and bidirectional converter of the present invention can reduce switching loss.
本発明の第1の実施形態に係るコンバータの説明図である。It is explanatory drawing of the converter which concerns on the 1st Embodiment of this invention. 本発明の第1の実施形態に係るコンバータにおいて第1回路1のスイッチング素子S1~S4の電圧及び電流の一例を示す波形図である。4 is a waveform diagram showing an example of voltages and currents of switching elements S1 to S4 of the first circuit 1 in the converter according to the first embodiment of the present invention. FIG. 本発明の第1の実施形態に係るコンバータにおいて第2回路2のスイッチング素子S5、S6の電圧、電流及び一方向性素子D7、D8の電圧、電流の一例を示す波形図である。4 is a waveform diagram showing an example of voltages and currents of switching elements S5 and S6 of the second circuit 2 and voltages and currents of unidirectional elements D7 and D8 in the converter according to the first embodiment of the present invention. FIG. 本発明の第1の実施形態に係るコンバータにおいて各タイミングで形成される回路図である。It is a circuit diagram formed at each timing in the converter according to the first embodiment of the present invention. 本発明の第2の実施形態に係る双方向コンバータの構成図である。It is a block diagram of the bidirectional | two-way converter which concerns on the 2nd Embodiment of this invention.
(第1の実施形態)  
 本発明に係る第1の実施形態のコンバータについて説明する。図1は、本発明の第1の実施形態に係るコンバータの説明図であり、図1(a)は本発明の第1の実施形態に係るコンバータの構成図、図1(b)は本発明の第1の実施形態に係るコンバータのスイッチング素子の駆動タイミングの説明図である。図1(a)に示すように、コンバータは、トランス11と、トランス11の1次巻線11a側に接続される第1回路1と、トランス11の2次巻線11b側に接続される第2の回路2と、インダクタンス手段Lと、制御回路3とを備える。このコンバータは、第1端子T1及び第2端子T2側から入力される直流を交流に変換させて第1回路1から出力し、トランス11を介して第2回路2で交流を直流に変換して出力側の第3端子T3、第4端子T4側へ電力を供給する。
(First embodiment)
A converter according to a first embodiment of the present invention will be described. FIG. 1 is an explanatory diagram of a converter according to the first embodiment of the present invention, FIG. 1 (a) is a configuration diagram of the converter according to the first embodiment of the present invention, and FIG. 1 (b) is the present invention. It is explanatory drawing of the drive timing of the switching element of the converter which concerns on 1st Embodiment. As shown in FIG. 1A, the converter includes a transformer 11, a first circuit 1 connected to the primary winding 11a side of the transformer 11, and a second circuit connected to the secondary winding 11b side of the transformer 11. 2 circuit 2, inductance means L, and control circuit 3. This converter converts the direct current input from the first terminal T1 and the second terminal T2 side into alternating current and outputs it from the first circuit 1, and converts the alternating current into direct current in the second circuit 2 via the transformer 11. Electric power is supplied to the third terminal T3 and the fourth terminal T4 side on the output side.
 第1端子T1、第2端子T2には外付けされる電源からの直流電力が入力される。第1端子T1、第2端子T2の間にはコンデンサ16が接続され、直流電圧となる。さらに第1端子T1、第2端子T2間には第1回路1が接続され、第1回路1は、第1レグ12及び第2レグ13の上下アームをスイッチング素子S1~S4で構成したフルブリッジの回路となっている。 DC power from an external power supply is input to the first terminal T1 and the second terminal T2. A capacitor 16 is connected between the first terminal T1 and the second terminal T2, and becomes a DC voltage. Further, the first circuit 1 is connected between the first terminal T1 and the second terminal T2, and the first circuit 1 is a full bridge in which upper and lower arms of the first leg 12 and the second leg 13 are configured by switching elements S1 to S4. It becomes the circuit of.
 第1回路1の第1レグ12、第2レグ13は、第1端子T1と第2端子T2との間にそれぞれ並列に接続される。第1レグ12は、スイッチング素子S1、S2を上下アームとし、第2レグ13は、スイッチング素子S3、S4を上下アームとする。図1(a)では、スイッチング素子S1~S4はスイッチ素子Q1~Q4に逆並列ダイオードD1~D4が内蔵され並列コンデンサC1~C4がそれぞれ並列に内蔵されたものを用いている。つまり、逆並列ダイオードD1~D4はスイッチング素子S1~S4の内部ダイオードであり、並列コンデンサC1~C4はスイッチング素子S1~S4の寄生容量である。 The first leg 12 and the second leg 13 of the first circuit 1 are respectively connected in parallel between the first terminal T1 and the second terminal T2. The first leg 12 has switching elements S1 and S2 as upper and lower arms, and the second leg 13 has switching elements S3 and S4 as upper and lower arms. In FIG. 1 (a), switching elements S1 to S4 include switching elements Q1 to Q4 including antiparallel diodes D1 to D4 and parallel capacitors C1 to C4, respectively. That is, the antiparallel diodes D1 to D4 are internal diodes of the switching elements S1 to S4, and the parallel capacitors C1 to C4 are parasitic capacitances of the switching elements S1 to S4.
 なお、本発明においては、スイッチ素子Q1~Q4に並列に接続された逆並列ダイオードD1~D4は、図1(a)に示したようにスイッチング素子S1~S4の内蔵ダイオードを用いてもよく、スイッチング素子S1~S4とは別に外付けされたダイオードを用いてもよく、またはこれらの組み合わせであってもよい。同様に、スイッチ素子Q1~Q4に並列に接続された並列コンデンサC1~C4は、図1(a)に示したようにスイッチング素子S1~S4の寄生容量を用いてもよく、スイッチング素子S1~S4とは別に外付けされたコンデンサを用いてもよく、またはこれらの組み合わせであってもよい。 In the present invention, the anti-parallel diodes D1 to D4 connected in parallel to the switching elements Q1 to Q4 may use the built-in diodes of the switching elements S1 to S4 as shown in FIG. An external diode may be used separately from the switching elements S1 to S4, or a combination thereof may be used. Similarly, the parallel capacitors C1 to C4 connected in parallel to the switching elements Q1 to Q4 may use the parasitic capacitances of the switching elements S1 to S4 as shown in FIG. Alternatively, an externally attached capacitor may be used, or a combination thereof may be used.
 第1コンデンサCa、第2コンデンサCbは、組となる第1回路1のスイッチング素子S1とS4又はS2とS3のうち先にオフさせるスイッチング素子にそれぞれ並列に接続される。図1(a)では、第1コンデンサCa、第2コンデンサCbを、先にオフさせる第2レグ13の上下アームのスイッチング素子S3、S4にそれぞれ並列に接続している。 The first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S1 and S4 or the switching elements S2 and S3 of the first circuit 1 to be turned off first. In FIG. 1A, the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S3 and S4 of the upper and lower arms of the second leg 13 that are turned off first.
 次に、第2回路2は、一方向性素子D7、D8と2つのスイッチング素子S5、S6とを備えるブリッジ接続回路と、2つのスイッチング素子S5、S6にそれぞれ並列に接続される第3コンデンサCcと第4コンデンサCdとを有し、トランス11の2次巻線11b側に接続される。図1(a)では、スイッチング素子S5、S6は、一方向性素子D5、D6が内蔵され並列コンデンサC5、C6が寄生容量としてそれぞれスイッチ素子Q5、Q6に並列に接続されたものを用いている。また、一方向性素子D5とD6とが同じ極性で直列に接続されたスイッチング素子S5とS6との直列回路と、同じ極性で直列に接続された一方向性素子D7とD8との直列回路とが、それぞれ第3端子T3、第4端子T4間側に並列に接続される。 Next, the second circuit 2 includes a bridge connection circuit including unidirectional elements D7 and D8 and two switching elements S5 and S6, and a third capacitor Cc connected in parallel to the two switching elements S5 and S6, respectively. And a fourth capacitor Cd, and is connected to the secondary winding 11b side of the transformer 11. In FIG. 1A, the switching elements S5 and S6 include unidirectional elements D5 and D6 and parallel capacitors C5 and C6 connected as parallel capacitors to the switching elements Q5 and Q6, respectively. . In addition, a series circuit of switching elements S5 and S6 in which unidirectional elements D5 and D6 are connected in series with the same polarity, and a series circuit of unidirectional elements D7 and D8 connected in series with the same polarity, Are connected in parallel between the third terminal T3 and the fourth terminal T4, respectively.
 図1(a)では、スイッチ素子Q5、Q6に逆並列ダイオードD5、D6と並列コンデンサC5、C6とがそれぞれ並列に接続されたスイッチング素子S5、S6を用いている。つまり、一方向性素子D5、D6はスイッチング素子S5、S6の内部ダイオードであり、並列コンデンサC5、C6はスイッチング素子S5、S6の寄生容量である。なお、本発明においては、一方向性素子D5、D6は、図1(a)に示したようにスイッチング素子S5、S6の内蔵ダイオードを用いてもよく、スイッチング素子S5、S6とは別に外付けされたダイオードを用いてもよく、またはこれらの組み合わせであってもよい。同様に、並列コンデンサC5、C6は、図1(a)に示したようにスイッチング素子S5、S6の寄生容量を用いてもよく、スイッチング素子S5、S6とは別に外付けされたコンデンサを用いてもよく、またはこれらの組み合わせであってもよい。 In FIG. 1 (a), switching elements S5 and S6 in which antiparallel diodes D5 and D6 and parallel capacitors C5 and C6 are connected in parallel to switching elements Q5 and Q6, respectively, are used. That is, the unidirectional elements D5 and D6 are internal diodes of the switching elements S5 and S6, and the parallel capacitors C5 and C6 are parasitic capacitances of the switching elements S5 and S6. In the present invention, the unidirectional elements D5 and D6 may use the built-in diodes of the switching elements S5 and S6 as shown in FIG. 1A, and are externally attached separately from the switching elements S5 and S6. Diodes may be used, or a combination thereof. Similarly, the parallel capacitors C5 and C6 may use the parasitic capacitances of the switching elements S5 and S6 as shown in FIG. 1A, and use capacitors externally attached separately from the switching elements S5 and S6. Or a combination thereof.
 第2回路2のブリッジ接続回路内で、一方向性素子D5、D6が同じ極性で直列に接続される接続点側と一方向性素子D7、D8が同じ極性で直列に接続される他方の接続点側とには、トランス11の2次巻線11bが接続される。また、第3端子T3、第4端子T4の間にはコンデンサ17が接続され、直流電圧が第3端子T3、第4端子T4の間に出力される。 In the bridge connection circuit of the second circuit 2, the connection point side where the unidirectional elements D5, D6 are connected in series with the same polarity and the other connection where the unidirectional elements D7, D8 are connected in series with the same polarity The secondary winding 11b of the transformer 11 is connected to the point side. A capacitor 17 is connected between the third terminal T3 and the fourth terminal T4, and a DC voltage is output between the third terminal T3 and the fourth terminal T4.
 次に、インダクタンス手段Lは、第1レグ12の上下アームの接続点側と第2レグ13の上下アームの接続点側とにトランス11の1次巻線11aを介して接続される。このインダクタンス手段Lは、第2回路2のブリッジ接続回路内で一方向性素子D5、D6が同じ極性で直列に接続される接続点側と一方向性素子D7、D8が同じ極性で直列に接続される他方の接続点側とにトランス11の2次巻線11bを介して接続させてもよい。また、図1(a)では、インダクタンス手段Lの一端が第1レグ12の上下アームの接続点側に、他端がトランス11の1次巻線11a側に接続されるが、インダクタンス手段Lの一端を第2レグ13の上下アームの接続点側に、他端をトランス11の1次巻線11a側に接続させてもよい。インダクタンス手段Lが2次巻線11bを介して接続される場合も同様である。 Next, the inductance means L is connected to the connection point side of the upper and lower arms of the first leg 12 and the connection point side of the upper and lower arms of the second leg 13 via the primary winding 11 a of the transformer 11. In the inductance means L, the unidirectional elements D5 and D6 are connected in series with the same polarity in the bridge connection circuit of the second circuit 2, and the unidirectional elements D7 and D8 are connected in series with the same polarity. The other connection point side may be connected via the secondary winding 11b of the transformer 11. In FIG. 1A, one end of the inductance means L is connected to the connection point side of the upper and lower arms of the first leg 12, and the other end is connected to the primary winding 11a side of the transformer 11. One end may be connected to the connection point side of the upper and lower arms of the second leg 13, and the other end may be connected to the primary winding 11 a side of the transformer 11. The same applies to the case where the inductance means L is connected via the secondary winding 11b.
 制御回路3は、第1回路1のスイッチング素子S1~S4、第2回路2のスイッチング素子S5、S6にそれぞれ駆動信号を与えて、各スイッチング素子のオンオフ制御をする。図1(a)のコンバータは、第1レグ12又は第2レグ13の上アームのスイッチング素子S1又はS3と第2レグ13又は第1レグ12の下アームのスイッチング素子S4又はS2とがそれぞれ一組となって交互にオンオフする。例えば、組となる第1回路1のスイッチング素子S1、S4のうち、第2のコンデンサCbが並列に接続されたスイッチング素子S4を先にオフさせて、その後に、スイッチング素子S1を後からオフさせる。同様に、他方の組となる第1回路1のスイッチング素子S2、S3のうち、第1のコンデンサCaが並列に接続されたスイッチング素子S3を先にオフさせて、その後に、スイッチング素子S2を後からオフさせる。 The control circuit 3 gives drive signals to the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2, respectively, and performs on / off control of each switching element. In the converter of FIG. 1A, the switching element S1 or S3 of the upper arm of the first leg 12 or the second leg 13 and the switching element S4 or S2 of the lower arm of the second leg 13 or the first leg 12 are respectively one. Turns on and off alternately in pairs. For example, among the switching elements S1 and S4 of the first circuit 1 to be paired, the switching element S4 to which the second capacitor Cb is connected in parallel is turned off first, and then the switching element S1 is turned off later. . Similarly, among the switching elements S2 and S3 of the first circuit 1 which is the other set, the switching element S3 to which the first capacitor Ca is connected in parallel is turned off first, and then the switching element S2 is turned on later. To turn off.
 また、制御回路3は、第1回路1の組となるスイッチング素子S1とS4又はS2とS3とが共にオンしている時間の割合が小さい場合にも、先にオフさせるスイッチング素子S4又はS3をオフさせるときには第2回路2のスイッチング素子S5又はS6を導通させておく。そして、後からオフさせるスッチング素子S1又はS2をオフさせるよりも前に導通させている第2回路2のスイッチング素子S5又はS6をオフする。 In addition, the control circuit 3 sets the switching element S4 or S3 to be turned off first even when the ratio of the time when both of the switching elements S1 and S4 or S2 and S3 that are the set of the first circuit 1 are on is small. When turning off, the switching element S5 or S6 of the second circuit 2 is made conductive. Then, the switching element S5 or S6 of the second circuit 2 that is turned on before turning off the switching element S1 or S2 to be turned off later is turned off.
 なお、制御回路3は、第1回路1の組となるスイッチング素子S1とS4又はS2とS3が同時にオンしている期間に、第2回路2のスイッチング素子S5、S6のオンオフ制御を行い、第2回路を整流回路として機能させる動作と2次巻線11bを短絡状態にさせる動作とを切替えることで広範囲な入出力電圧電流に対応させることができる。 Note that the control circuit 3 performs on / off control of the switching elements S5 and S6 of the second circuit 2 during the period in which the switching elements S1 and S4 or S2 and S3 of the pair of the first circuit 1 are simultaneously turned on. A wide range of input / output voltage currents can be handled by switching between the operation of causing the two circuits to function as a rectifier circuit and the operation of causing the secondary winding 11b to be in a short circuit state.
 前者の第2回路を整流回路として機能させる動作では、スイッチング素子S1とS4又はS2とS3が同時にオンしている期間には、第2回路2のスイッチング素子S5又はS6のスイッチ素子Q5又はQ6を順方向に導通させず、第1端子T1、第2端子T2側から入力される電力はインダクタンス手段Lから一方向性素子D5とD8又はD6とD7とを介して第3端子T3、第4端子T4側に供給させる。 In the operation of allowing the former second circuit to function as a rectifier circuit, the switching element S5 or S6 of the second circuit 2 is switched on during the period when the switching elements S1 and S4 or S2 and S3 are simultaneously turned on. The power input from the first terminal T1 and the second terminal T2 side without conducting in the forward direction is supplied from the inductance means L via the unidirectional elements D5 and D8 or D6 and D7 to the third terminal T3 and the fourth terminal. Supply to the T4 side.
 後者の2次巻線11bを短絡状態にさせる動作では、スイッチング素子S1とS4又はS2とS3が同時にオンしている期間に第2回路2のスイッチング素子S6又はS5を導通させて第1端子T1、第2端子T2側から入力される電力をインダクタンス手段Lに一旦蓄積させてからオフし、インダクタンス手段Lに蓄積されたエネルギーを一方向性素子D5、D8を介して第3端子T3、第4端子T4側に供給させる。 In the operation of short-circuiting the secondary winding 11b, the switching element S1 and S4 or the switching element S6 or S5 of the second circuit 2 is turned on during the period in which the switching elements S1 and S4 or S2 and S3 are simultaneously turned on. The power input from the second terminal T2 side is temporarily stored in the inductance means L and then turned off, and the energy stored in the inductance means L is supplied to the third terminal T3, the fourth through the unidirectional elements D5, D8. Supply to the terminal T4 side.
 図1(a)に示した第2回路2の出力電圧検出手段18は、第3端子T3及び第4端子T4間に出力される第2回路2の出力電圧を検出する。この出力電圧検出値は制御回路3に入力される。制御回路3は、出力電圧検出値にもとづいて第1回路1のスイッチング素子S1~S4及び第2回路2のスイッチング素子S5、S6をオンオフさせて、第2回路2の出力電圧を制御する。例えば、制御回路3は、出力電圧検出値を負荷条件に応じた目標電圧値に近づけるように第1回路1のスイッチング素子S1~S4のパルス幅や周波数等を変調させるパルス制御を行う。第2回路2の出力電圧検出手段18は、例えば出力側に抵抗を接続し、この抵抗に印加される電圧を検出する。 The output voltage detection means 18 of the second circuit 2 shown in FIG. 1A detects the output voltage of the second circuit 2 output between the third terminal T3 and the fourth terminal T4. This output voltage detection value is input to the control circuit 3. The control circuit 3 controls the output voltage of the second circuit 2 by turning on and off the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2 based on the output voltage detection value. For example, the control circuit 3 performs pulse control for modulating the pulse width, frequency, and the like of the switching elements S1 to S4 of the first circuit 1 so that the output voltage detection value approaches the target voltage value according to the load condition. The output voltage detection means 18 of the second circuit 2 connects a resistor on the output side, for example, and detects the voltage applied to this resistor.
 なお、駆動信号については、第1回路1のスイッチング素子、第2回路2のスイッチング素子をオンさせるための駆動信号をオン信号、オフさせるための駆動信号をオフ信号として下記の動作で説明する。駆動信号としては、電圧、電流などを用いる。また、オン信号、オフ信号等は、オン、オフの期間ずっと信号を与えるものであっても、トリガーとして短い時間の信号を与えるものであってもよく、特に限定されるものではない。 The drive signal will be described in the following operation with the drive signal for turning on the switching element of the first circuit 1 and the switching element of the second circuit 2 being an on signal and the drive signal for turning off the off signal. As the drive signal, voltage, current, or the like is used. Further, the on signal, the off signal, and the like are not particularly limited, and may be a signal that is given throughout the on or off period or a signal that is given as a trigger for a short time.
 次に、本発明の第1の実施形態に係るコンバータの動作の一例について説明する。第1回路1側から第2回路2側へ電力を供給するときに、入力側となる第1回路1の組となるスイッチング素子S1とS4又はS2とS3とが共にオンしている時間の割合が小さい場合のコンバータの動作について説明する。 Next, an example of the operation of the converter according to the first embodiment of the present invention will be described. Percentage of time during which both switching elements S1 and S4 or S2 and S3, which are a set of the first circuit 1 on the input side, are turned on when power is supplied from the first circuit 1 side to the second circuit 2 side The operation of the converter when is small will be described.
 図1(b)は、本発明の第1の実施形態に係るコンバータにおいて第1回路1のスイッチング素子S1~S4及び第2回路2のスイッチング素子S5、S6の駆動信号の一例を示す波形図である。 FIG. 1B is a waveform diagram showing an example of drive signals for the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2 in the converter according to the first embodiment of the present invention. is there.
 図1(b)において、いま、時刻t1で組となる第1回路1のスイッチング素子S1及びS4にオン信号が与えられ、スイッチング素子S5のオン信号が時刻t1~t2の間で与えられたとする。なお、図1(b)ではスイッチング素子S5のオン信号を時刻t1~t2の間に与えているが、1次巻線11aを通じて流れる電流の振動を防止するためにはスイッチ素子Q5が順方向に導通する時点t3のときにオン信号が与えられていればよい。 In FIG. 1B, it is assumed that an ON signal is given to the switching elements S1 and S4 of the first circuit 1 that are paired at time t1, and an ON signal of the switching element S5 is given between times t1 and t2. . In FIG. 1B, the ON signal of the switching element S5 is given between times t1 and t2. However, in order to prevent the oscillation of the current flowing through the primary winding 11a, the switching element Q5 is moved forward. It is only necessary that the ON signal is given at the time point t3 when the connection is made.
 図2は、本発明の第1の実施形態に係るコンバータにおいて第1回路1のスイッチング素子S1~S4の電圧及び電流の一例を示す波形図であり、図3は、本発明の第1の実施形態に係るコンバータにおいて第2回路2のスイッチング素子S5、S6の電圧、電流及び一方向性素子D7、D8の電圧、電流の一例を示す波形図である。また、図4は、本発明の第1の実施形態に係るコンバータにおいて各動作タイミングで形成される回路図である。 FIG. 2 is a waveform diagram showing an example of voltages and currents of the switching elements S1 to S4 of the first circuit 1 in the converter according to the first embodiment of the present invention, and FIG. 3 is a waveform diagram showing the first embodiment of the present invention. It is a wave form diagram showing an example of voltage and current of switching elements S5 and S6 of the 2nd circuit 2, and voltage and current of unidirectional elements D7 and D8 in a converter concerning a form. FIG. 4 is a circuit diagram formed at each operation timing in the converter according to the first embodiment of the present invention.
 ここで、図2及び図3に示す電流波形では、第1回路1のスイッチング素子S1~S4、第2回路2のスイッチング素子S5、S6を順方向に流れる電流をプラスとし、第1回路1のスイッチング素子S1~S4、第2回路2のスイッチング素子S5、S6を逆方向に流れる電流及び一方向性素子D7、D8を順方向に流れる電流をマイナスとしている。 Here, in the current waveforms shown in FIGS. 2 and 3, the current flowing in the forward direction through the switching elements S1 to S4 of the first circuit 1 and the switching elements S5 and S6 of the second circuit 2 is positive, The current flowing in the reverse direction through the switching elements S1 to S4 and the switching elements S5 and S6 in the second circuit 2 and the current flowing in the forward direction through the unidirectional elements D7 and D8 are negative.
 図2に示すように、時刻t1ではスイッチング素子S1の電流及びスイッチング素子S4の電流はマイナス側、つまりダイオードD1及びD4を導通しているが、その後プラス側、つまりスイッチ素子Q1及びQ4を順方向に導通する。 As shown in FIG. 2, at time t1, the current of the switching element S1 and the current of the switching element S4 are on the negative side, that is, the diodes D1 and D4, but then the positive side, that is, the switching elements Q1 and Q4 are forward. Conducted to.
 図4(a)は、時刻t1後のスイッチ素子Q1及びQ4を順方向に導通しているときの電流の流れを示したものである。トランス11の1次巻線11a側では電流がスイッチ素子Q1、Q4を通じて流れ、2次巻線11b側では一方向性素子D5、D8を介して電流が流れる。第1端子T1及び第2端子T2側から供給される入力電力は、インダクタンス手段Lを介して第3端子T3、第4端子T4側に供給される。 FIG. 4 (a) shows the flow of current when the switch elements Q1 and Q4 after the time t1 are conducting in the forward direction. On the primary winding 11a side of the transformer 11, current flows through the switching elements Q1 and Q4, and on the secondary winding 11b side, current flows through the unidirectional elements D5 and D8. Input power supplied from the first terminal T1 and the second terminal T2 side is supplied to the third terminal T3 and the fourth terminal T4 side via the inductance means L.
 時刻t2で、例えば、第2回路2の出力電圧検出手段18で検出された第3端子T3、第4端子T4間の電圧検出値が目標値に近づくように、制御回路3は、組となる第1回路1のスイッチング素子S1、S4のうち先にオフさせるスイッチング素子S4にオフ信号を与える。このため、図2に示すように、電流値が比較的大きな状態でスイッチ素子Q4がオフすることになる。時刻t2でスイッチ素子Q4がオフすると、図4(b)に示すように、1次巻線11a側では、オフしたスイッチ素子Q4に並列に接続された並列コンデンサC4及び第2コンデンサCbを充電する方向にスイッチ素子Q1を通じて電流が流れる。一方、並列コンデンサC3及び第1コンデンサCaからは、スイッチ素子Q1を通じて放電電流が流れる。そこで、先にオフさせる第1回路1のスイッチング素子S4、S3に並列に接続されるコンデンサの容量を大きくし、スイッチング素子S4の両端電圧の上昇を緩やかにさせることで、第1回路1のスイッチング素子S4のオフ時のスイッチング損失の低減を図っている。スイッチング素子S3についても同様に、並列コンデンサC3に第1コンデンサCaを並列に接続することでスイッチング素子S3のオフ時のスイッチング損失を低減させている。なお、2次巻線11b側の電流は、時刻t1から継続して一方向性素子D5、D8を通じて流れている。 At time t2, for example, the control circuit 3 is paired so that the voltage detection value between the third terminal T3 and the fourth terminal T4 detected by the output voltage detection means 18 of the second circuit 2 approaches the target value. An off signal is given to switching element S4 which turns off first among switching elements S1 and S4 of the 1st circuit 1. FIG. For this reason, as shown in FIG. 2, the switch element Q4 is turned off with a relatively large current value. When the switch element Q4 is turned off at time t2, as shown in FIG. 4B, on the primary winding 11a side, the parallel capacitor C4 and the second capacitor Cb connected in parallel to the turned off switch element Q4 are charged. A current flows in the direction through the switch element Q1. On the other hand, a discharge current flows from the parallel capacitor C3 and the first capacitor Ca through the switch element Q1. Therefore, the capacitance of the capacitor connected in parallel to the switching elements S4 and S3 of the first circuit 1 to be turned off first is increased, and the rise of the voltage across the switching element S4 is moderated, whereby the switching of the first circuit 1 is performed. The switching loss when the element S4 is off is reduced. Similarly, the switching element S3 is connected to the parallel capacitor C3 in parallel with the first capacitor Ca to reduce the switching loss when the switching element S3 is off. Note that the current on the secondary winding 11b side continues to flow through the unidirectional elements D5 and D8 from time t1.
 並列コンデンサC3及び第1コンデンサCaの放電、並列コンデンサC4及び第2コンデンサCbの充電動作が終わるとスイッチ素子Q3に並列に接続された逆並列ダイオードD3が導通する。1次巻線11a側ではインダクタンス手段Lに蓄積されたエネルギー及びトランス11の励磁電流によって、直前に1次巻線11a、インダクタンス手段Lに流れていた電流と同じ方向に、1次巻線11aと後からオフさせるスイッチング素子S1とを有する1次側循環経路、ここでは、図4(c)に示すように、1次巻線11a、逆並列ダイオードD3、スイッチ素子Q1、インダクタンス手段Lによって形成された経路に電流が流れる。 When the parallel capacitor C3 and the first capacitor Ca are discharged and the parallel capacitor C4 and the second capacitor Cb are charged, the antiparallel diode D3 connected in parallel to the switch element Q3 is turned on. On the primary winding 11a side, the primary winding 11a and the primary winding 11a are arranged in the same direction as the current flowing in the primary winding 11a and the inductance means L immediately before by the energy accumulated in the inductance means L and the exciting current of the transformer 11. A primary side circulation path having a switching element S1 to be turned off later, here, as shown in FIG. 4C, is formed by a primary winding 11a, an antiparallel diode D3, a switching element Q1, and an inductance means L. Current flows through the path.
 2次巻線11b側の電流は、時刻t1から継続して一方向性素子D5、D8を順方向に流れているが、時刻t3で一方向性素子D5を順方向の導通が終了するとスイッチ素子Q5を順方向に流れ始める。なお、スイッチング素子S5のオン信号は、1次側循環経路を流れる電流が振動しないように一方向性素子D5を順方向の導通が終了する時点t3には与えておく。 The current on the secondary winding 11b side continues to flow in the forward direction through the unidirectional elements D5 and D8 from time t1, but when the forward conduction in the unidirectional element D5 ends at time t3, the switch element Start to flow forward in Q5. The ON signal of the switching element S5 is given to the unidirectional element D5 at the time t3 when the forward conduction ends so that the current flowing through the primary-side circulation path does not vibrate.
 一方向性素子D5が順方向に導通すると、図4(c)に示すように、2次巻線11b側では、トランス11の励磁電流がスイッチ素子Q5及び一方向性素子D7を介して流れる。このため、トランス11の励磁電流は、1次巻線11a側の1次側循環経路と2次巻線11b側とに分流することになる。 When the unidirectional element D5 conducts in the forward direction, as shown in FIG. 4C, the exciting current of the transformer 11 flows through the switch element Q5 and the unidirectional element D7 on the secondary winding 11b side. For this reason, the exciting current of the transformer 11 is shunted to the primary circulation path on the primary winding 11a side and the secondary winding 11b side.
 トランス11の励磁電流が2次巻線11b側にも分流するため、図2のスイッチング素子S1及びS3の電流に示すように1次側循環経路に流れる電流は非常に小さくなる。この状態で後からオフさせるスイッチング素子S1をオフすると、スイッチング素子S1と同じレグ12の他方のスイッチング素子S2をオンさせる時にゼロ電圧スイッチングを実現させることができない場合がある。スイッチング素子S1をオフさせた後に、トランス11の励磁電流によってコンデンサC1を充電し、かつ次にオンさせるスイッチング素子S2のコンデンサC2をゼロ電圧まで放電させないと、スイッチング素子S2をゼロ電圧の状態でオンさせられないからである。 Since the exciting current of the transformer 11 is also shunted to the secondary winding 11b side, the current flowing through the primary side circulation path becomes very small as shown by the currents of the switching elements S1 and S3 in FIG. If the switching element S1 to be turned off later in this state is turned off, zero voltage switching may not be realized when the other switching element S2 of the same leg 12 as the switching element S1 is turned on. After the switching element S1 is turned off, the capacitor C1 is charged by the exciting current of the transformer 11, and the switching element S2 is turned on in the zero voltage state unless the capacitor C2 of the switching element S2 to be turned on is discharged to zero voltage. It is because it cannot be made.
 本発明では、後からオフさせるスイッチング素子S1をオフする前に、導通状態にあるスイッチング素子S5をオフさせ、2次巻線11b側のコンデンサ、すなわち、コンデンサC5、第3のコンデンサCc、コンデンサC6、第4のコンデンサCdの合成容量とインダクタLとの共振動作を利用してコンデンサC1、C2の充放電時に1次側循環経路に流れる電流を大きくする。 In the present invention, before turning off the switching element S1 to be turned off later, the switching element S5 in the conductive state is turned off, and the capacitors on the secondary winding 11b side, that is, the capacitor C5, the third capacitor Cc, and the capacitor C6. The current flowing through the primary-side circulation path during charging and discharging of the capacitors C1 and C2 is increased by utilizing the resonance operation of the combined capacitance of the fourth capacitor Cd and the inductor L.
 この動作について具体的に説明する。図1(b)に示すように時刻t4でスイッチング素子S5の駆動信号をオフにする。すると、図4(d)に示すように2次巻線11b側では、コンデンサC5及び第3のコンデンサCcを充電し、コンデンサC6及び第4のコンデンサCdを放電する電流が流れ、図3のスイッチング素子S5、S6の電圧及び電流波形は、インダクタンス手段と2次側のコンデンサとの共振動作を反映した波形となっている。この2次巻線側11bの共振電流は、トランス11を介して1次巻線11a側の1次側循環経路に流れる電流に重畳される。図4(d)に示すように1次巻線11a側では継続して1次側循環経路に電流が流れ、図2のスイッチング素子S1の電流波形は、時刻t4まではトランス11の励磁電流値であった電流値が時刻t4の後に上昇する。つまり、1次側循環経路には、2次巻線11b側のコンデンサの合成容量とインダクタンス手段Lとによる共振作用の影響によって重畳されたことによる励磁電流よりも大きい電流が流れる。 This operation will be described specifically. As shown in FIG. 1B, the drive signal for the switching element S5 is turned off at time t4. Then, as shown in FIG. 4 (d), on the secondary winding 11b side, a current for charging the capacitor C5 and the third capacitor Cc and discharging the capacitor C6 and the fourth capacitor Cd flows, and the switching of FIG. The voltage and current waveforms of the elements S5 and S6 are waveforms that reflect the resonant operation of the inductance means and the secondary side capacitor. The resonance current on the secondary winding side 11 b is superimposed on the current flowing through the primary side circulation path on the primary winding 11 a side via the transformer 11. As shown in FIG. 4D, a current continuously flows in the primary circulation path on the primary winding 11a side, and the current waveform of the switching element S1 in FIG. 2 is the exciting current value of the transformer 11 until time t4. The current value increased after time t4. That is, a current larger than the excitation current caused by the superposition due to the resonance effect of the combined capacitance of the capacitor on the secondary winding 11b side and the inductance means L flows through the primary side circulation path.
 時刻t5で、組となるスイッチング素子S1、S4のうち後からオフさせるスイッチング素子S1をオフすると、図4(e)に示すように、1次巻線11a側では、ダイオードD3を介してコンデンサC1、C2を充放電する電流が流れる。上記の共振動作を利用して時刻t5の時に1次側循環経路に流れていた電流をコンデンサC1、C2の充放電を行うのに十分な大きさにしたので、図2のスイッチング素子S2の電圧波形は時刻t5以降にほぼゼロボルトまで下がっている。ここでは、2次巻線11b側のコンデンサの合成容量とインダクタンス手段Lとの共振動作を開始してからスイッチング素子S1をオフするまでの時刻t4~t5の期間は、上述の共振動作における共振一周期の1/2以内の時間とする。1次側循環経路に流れる励磁電流に共振電流分が重畳された電流は、共振動作開始後共振一周期の1/2の時までは上昇し、共振一周期の1/2でピーク値となり、その後は減少するためである。一方、図4(e)の2次巻線11b側では、コンデンサC5及び第3のコンデンサCcを放電し、コンデンサC6及び第4のコンデンサCdが充電する電流が流れている。 When the switching element S1 to be turned off later is turned off at the time t5, the switching element S1 to be turned off later is turned off, as shown in FIG. 4E, on the primary winding 11a side, the capacitor C1 is connected via the diode D3. , A current for charging / discharging C2 flows. Since the current flowing in the primary circulation path at time t5 is made large enough to charge and discharge the capacitors C1 and C2 using the above resonance operation, the voltage of the switching element S2 in FIG. The waveform has dropped to almost zero volts after time t5. Here, the period from time t4 to t5 from the start of the resonance operation of the combined capacitance of the capacitor on the secondary winding 11b side and the inductance means L to the time when the switching element S1 is turned off is the resonance one in the resonance operation described above. The time is within 1/2 of the cycle. The current obtained by superimposing the resonance current on the excitation current flowing through the primary side circulation path rises up to 1/2 of one resonance cycle after the start of resonance operation, and reaches a peak value at 1/2 of one resonance cycle. It is because it decreases after that. On the other hand, on the secondary winding 11b side in FIG. 4E, the capacitor C5 and the third capacitor Cc are discharged, and a current that charges the capacitor C6 and the fourth capacitor Cd flows.
 時刻t6で並列コンデンサC1、C2の充放電が終わると、図4(f)に示すように、逆並列ダイオードD2が導通する。1次巻線11a側では、時刻t6の直前に1次巻線11aに流れていた電流と同じ方向に、1次巻線11aから、逆並列ダイオードD3、D2を通じて電流が流れる。一方、2次巻線11b側では、コンデンサC5、第3のコンデンサCc、コンデンサC6、第4のコンデンサCdとインダクタLとの共振動作により、再びコンデンサC5及び第3のコンデンサCcを充電し、コンデンサC6及び第4のコンデンサCdが放電する電流が流れる。なお、逆並列ダイオードD2が導通を開始する時刻t6の時に、2次巻線11b側の電流は、図4(f)に示すコンデンサC5及び第3のコンデンサCcが放電し、コンデンサC6及び第4のコンデンサCdを充電する電流が流れている状態でもよい。 When the charging and discharging of the parallel capacitors C1 and C2 are completed at time t6, the antiparallel diode D2 becomes conductive as shown in FIG. On the primary winding 11a side, a current flows from the primary winding 11a through the antiparallel diodes D3 and D2 in the same direction as the current flowing in the primary winding 11a immediately before time t6. On the other hand, on the secondary winding 11b side, the capacitor C5, the third capacitor Cc, the capacitor C6, the fourth capacitor Cd, and the inductor L are recharged to recharge the capacitor C5 and the third capacitor Cc. A current that discharges C6 and the fourth capacitor Cd flows. At time t6 when the antiparallel diode D2 starts to conduct, the current on the secondary winding 11b side is discharged from the capacitor C5 and the third capacitor Cc shown in FIG. It may be in a state where a current for charging the capacitor Cd is flowing.
 時刻t7で図2に示すように他方の組となる第1回路1のスイッチング素子S2、S3にオン信号を与える。時刻t7では、図3に示すように、スイッチング素子S2、S3の電流はマイナス側、つまり逆並列ダイオードD2、D3を流れているが、その後スイッチング素子S2、S3の電流はプラス側、つまりスイッチ素子Q2、Q3を流れる。図4(g)は、1次巻線11a側の電流がスイッチ素子Q2、Q3を介して流れる動作を示したものである。このとき、2次巻線11b側の電流は、一方向性素子D6、D7を介して流れている。図4(a)の場合と同様に、第1端子T1、第2端子T2間から入力された電力は、インダクタンス手段Lを介して第3端子T3、第4端子T4側に供給される。 At time t7, as shown in FIG. 2, an ON signal is given to the switching elements S2 and S3 of the first circuit 1 which is the other set. At time t7, as shown in FIG. 3, the currents of the switching elements S2 and S3 are flowing through the negative side, that is, the antiparallel diodes D2 and D3, but the currents of the switching elements S2 and S3 are thereafter the positive side, that is, the switching element. It flows through Q2 and Q3. FIG. 4G shows an operation in which the current on the primary winding 11a side flows through the switch elements Q2 and Q3. At this time, the current on the secondary winding 11b side flows through the unidirectional elements D6 and D7. As in the case of FIG. 4A, the power input from between the first terminal T1 and the second terminal T2 is supplied to the third terminal T3 and the fourth terminal T4 side via the inductance means L.
 スイッチ素子Q2、Q3が順方向に導通する直前にスイッチ素子Q2,Q3にそれぞれ並列に接続される逆並列ダイオードD2,D3が導通しているため、図2に示すように、第1回路1のスイッチング素子S2,S3はオン時にゼロ電圧スイッチングを実現している。上述のように1次側循環経路に流れる励磁電流を小さい場合であっても、共振動作を利用して1次側循環経路に流れる電流を大きくすることによって、後からオフさせるスイッチング素子のオン時にゼロ電圧スイッチングを実現させることができる。 Since the antiparallel diodes D2 and D3 connected in parallel to the switch elements Q2 and Q3, respectively, are turned on immediately before the switch elements Q2 and Q3 are turned on in the forward direction, as shown in FIG. The switching elements S2 and S3 realize zero voltage switching when turned on. As described above, even when the excitation current flowing through the primary side circulation path is small, by increasing the current flowing through the primary side circulation path using the resonance operation, the switching element that is turned off later is turned on. Zero voltage switching can be realized.
 時刻t7後の他方の組となる第1回路1のスイッチング素子S2、S3の動作ついては、上述の組となるスイッチング素子S1、S4の時刻t1から時刻t7と同様に動作させる。すなわち、例えば、第3端子T3、第4端子T4間の出力電圧が所望の値となるように、制御回路3は、組となるスイッチング素子S2、S3のうち第1コンデンサCaが並列に接続されたスイッチ素子Q3を先にオフさせる。次にスイッチ素子Q6を導通させてトランス11の励磁電流が1、2次巻線11a、11b側に分流している状態でスイッチ素子Q6をオフする。スイッチ素子Q6のオフ後の2次巻線11b側のコンデンサの合成容量とインダクタンス手段Lとの共振動作を利用して1次側循環経路に流れる電流を上昇させた状態で後からオフさせるスイッチ素子Q2をオフさせる。このように動作させることによって、組となるスイッチング素子S1とS4又はS2とS3とが共にオンしている時間の割合が小さい場合など1次側循環経路に流れる励磁電流が小さいときにも、後からオフさせるスイッチング素子のゼロ電圧スイッチングに必要な電流を確保することができる。 About the operation | movement of switching element S2, S3 of the 1st circuit 1 used as the other group after time t7, it is made to operate similarly to the time t7 of switching element S1, S4 used as the above-mentioned group. That is, for example, the control circuit 3 includes a first capacitor Ca connected in parallel among the pair of switching elements S2 and S3 so that the output voltage between the third terminal T3 and the fourth terminal T4 has a desired value. The switch element Q3 is turned off first. Next, the switch element Q6 is turned on, and the switch element Q6 is turned off in a state where the exciting current of the transformer 11 is shunted to the primary and secondary windings 11a and 11b. Switch element that turns off the current flowing in the primary-side circulation path in a state in which the current flowing through the primary-side circulation path is increased by utilizing the resonance operation of the combined capacitance of the capacitor on the secondary winding 11b side after the switch element Q6 is turned off and the inductance means L Turn off Q2. By operating in this way, even when the excitation current flowing through the primary-side circulation path is small, such as when the ratio of the time during which both the switching elements S1 and S4 or S2 and S3 are on is small, Therefore, it is possible to secure a current necessary for zero voltage switching of the switching element to be turned off.
 ここで、第2回路2の一方向性素子D5が順方向導通する期間にスイッチング素子S5にオン信号を与えて同期整流を行ってもよい。通常、逆方向導通時のスイッチ素子S5の電圧降下は一方向性素子D5の順方向導通時の電圧降下よりも小さいので、スイッチ素子Q5を逆方向に導通させることにより導通損失を低減させることができる。第2回路2の一方向性素子D6及びスイッチ素子Q6についても同様である。さらに、上記の実施形態1の説明では、第2回路2の一方向性素子D7、D8としてダイオードで示したが、この一例に限定されることなく電流を一方向へ導通させる素子であればよい。例えば、一方向性素子D7、D8として、一方向性素子D7、D8を外付けした又は内部ダイオードD7、D8を有したスイッチング素子S7、S8を用いてもよい。上述の一方向性素子D5、D6と同様に、一方向性素子D7、D8が順方向導通する期間に逆方向導通時の電圧降下が小さいスイッチ素子Q7、Q8を逆方向に導通させることで導通損失の低減を図ることができる。 Here, synchronous rectification may be performed by giving an ON signal to the switching element S5 during a period in which the unidirectional element D5 of the second circuit 2 conducts in the forward direction. Usually, since the voltage drop of the switch element S5 during reverse conduction is smaller than the voltage drop during forward conduction of the unidirectional element D5, conduction loss can be reduced by conducting the switch element Q5 in the reverse direction. it can. The same applies to the unidirectional element D6 and the switch element Q6 of the second circuit 2. Furthermore, in the description of the first embodiment, the diodes are shown as the unidirectional elements D7 and D8 of the second circuit 2. However, the present invention is not limited to this example, and any element that conducts current in one direction may be used. . For example, as the unidirectional elements D7 and D8, switching elements S7 and S8 having the unidirectional elements D7 and D8 attached externally or having internal diodes D7 and D8 may be used. As with the unidirectional elements D5 and D6 described above, the switch elements Q7 and Q8 having a small voltage drop during reverse conduction during the period in which the unidirectional elements D7 and D8 conduct in the forward direction are conducted by conducting in the reverse direction. Loss can be reduced.
 図1(b)に示すように、後からオフさせるスイッチング素子S1、S2の駆動信号が共にオフ信号となる期間Tdは、スイッチング素子S1又はS2のゼロ電圧スイッチングを実現させるために両端電圧がゼロまで下がる期間程度とする。また、後にオフさせるスイッチ素子Q1,Q2に並列に接続されるコンデンサの容量の並列コンデンサC1,C2は、スイッチング素子S1、S2内蔵の寄生容量の場合など小さい容量値となり、部品によってはバラツキがある。このため、スイッチング素子S1、S2内蔵の寄生容量に別付けのコンデンサを並列に接続させ、これらの合成容量を上記並列コンデンサC1,C2としてもよい。 As shown in FIG. 1 (b), during the period Td in which the drive signals of the switching elements S1 and S2 that are turned off later are both off signals, the voltage across the terminals is zero in order to realize zero voltage switching of the switching element S1 or S2. It will be about the period to fall to. Further, the parallel capacitors C1 and C2 having the capacitances of the capacitors connected in parallel to the switch elements Q1 and Q2 to be turned off later have a small capacitance value such as a parasitic capacitance built in the switching elements S1 and S2, and may vary depending on parts. . For this reason, a separate capacitor may be connected in parallel to the parasitic capacitances built in the switching elements S1 and S2, and these combined capacitances may be used as the parallel capacitors C1 and C2.
 なお、図1(b)及び図2に示すように、時刻t7で第1回路1のスイッチング素子S2、S3の駆動信号であるオン信号を同時に与えており、その後、スイッチ素子Q2及びスイッチ素子Q3が順方向に導通し始めている動作の一例を示した。しかし、上記の実施形態の動作の一例に限定されることなく、スイッチング素子S2、S3のオン信号を与える時刻t7は、逆並列ダイオードD2、D3が導通している期間であればよい。また、スイッチング素子S2、S3のオン信号を与える時点とスイッチ素子Q2及びスイッチ素子Q3が順方向に導通し始め時点とを時刻t7で一致させてもよい。スイッチ素子Q2、Q3の逆方向導通時の電圧降下が逆並列ダイオードD2、D3の順方向導通時の電圧降下よりも小さい場合には、スイッチング素子S2、S3のオン信号を与えてスイッチング素子S2、S3の導通損失を低減させることができる。これらの内容はもう一方の組となる第1回路1のスイッチング素子S1、S4の場合についても同様である。 As shown in FIGS. 1B and 2, at time t7, an ON signal that is a drive signal for the switching elements S2 and S3 of the first circuit 1 is simultaneously applied, and thereafter, the switching element Q2 and the switching element Q3. Shows an example of the operation that starts to conduct in the forward direction. However, without being limited to an example of the operation of the above-described embodiment, the time t7 when the ON signals of the switching elements S2 and S3 are applied may be a period in which the antiparallel diodes D2 and D3 are conductive. Further, the time point at which the ON signals of the switching elements S2 and S3 are applied may coincide with the time point at which the switch element Q2 and the switch element Q3 start to conduct in the forward direction at time t7. When the voltage drop at the time of reverse conduction of the switching elements Q2 and Q3 is smaller than the voltage drop at the time of forward conduction of the antiparallel diodes D2 and D3, an ON signal of the switching elements S2 and S3 is given to switch the switching elements S2, The conduction loss of S3 can be reduced. The same applies to the case of the switching elements S1 and S4 of the first circuit 1 as the other set.
 上記の第1の実施形態では、組となる第1回路1のスイッチング素子S1及びS4、S2及びS3のうち第2レグ13の上下アームのスイッチング素子S4、S3を先にオフさせているが、第1レグ12の上下アームのスイッチング素子S1、S2を先にオフさせてもよい。この場合、第1コンデンサCa、第2コンデンサCbを、先にオフさせるスイッチング素子S1、S2にそれぞれ接続させる。また、先にオフさせる第1回路1のスイッチング素子を、第1レグ12と第2レグ13との上アームのスイッチング素子S1、S3、又は、第1レグ12と第2レグ13との下アームのスイッチング素子S2、S4としてもよい。この場合、第1コンデンサCa、第2コンデンサCbを、先にオフさせるスイッチング素子S1、S3又はスイッチング素子S2、S4にそれぞれ並列に接続させる。 In the first embodiment described above, the switching elements S4 and S3 of the upper and lower arms of the second leg 13 among the switching elements S1 and S4, S2 and S3 of the first circuit 1 to be paired are turned off first. The switching elements S1 and S2 of the upper and lower arms of the first leg 12 may be turned off first. In this case, the first capacitor Ca and the second capacitor Cb are respectively connected to the switching elements S1 and S2 that are turned off first. The switching elements of the first circuit 1 to be turned off first are the switching elements S1 and S3 of the upper arms of the first leg 12 and the second leg 13, or the lower arms of the first leg 12 and the second leg 13. The switching elements S2 and S4 may be used. In this case, the first capacitor Ca and the second capacitor Cb are connected in parallel to the switching elements S1 and S3 or the switching elements S2 and S4 that are turned off first.
 また、上記の第1の実施形態において、図1に示した第2回路2のブリッジ接続回路内で、第3端子T3、第4端子T4間に接続されるスイッチング素子S5、S6の直列回路と一方向性素子D7,D8の直列回路との位置が入れ替わってもよい。この場合も、第3コンデンサCc、第4コンデンサCdは、オンオフさせる第2回路2のスイッチング素子S5、S6にそれぞれ並列に接続される。また、第2回路2において一方向性素子D7又はD8と第2回路2のスイッチング素子S5又はS6との直列回路をそれぞれ第3端子T3、第4端子T4間に接続する混合ブリッジ接続の回路構成にしてもよい。この場合も、第3コンデンサCc、第4コンデンサCdは、オンオフさせる第2回路2のスイッチング素子S5、S6にそれぞれ並列に接続させる。 In the first embodiment, the series circuit of the switching elements S5 and S6 connected between the third terminal T3 and the fourth terminal T4 in the bridge connection circuit of the second circuit 2 shown in FIG. The position of the unidirectional elements D7 and D8 with the series circuit may be switched. Also in this case, the third capacitor Cc and the fourth capacitor Cd are respectively connected in parallel to the switching elements S5 and S6 of the second circuit 2 to be turned on / off. Further, in the second circuit 2, a circuit configuration of a mixed bridge connection that connects a series circuit of the unidirectional element D7 or D8 and the switching element S5 or S6 of the second circuit 2 between the third terminal T3 and the fourth terminal T4, respectively. It may be. Also in this case, the third capacitor Cc and the fourth capacitor Cd are connected in parallel to the switching elements S5 and S6 of the second circuit 2 to be turned on / off, respectively.
(第2の実施形態)
 図5に、本発明の第2の実施形態に係る双方向コンバータの電気回路図を示す。本発明の第2の実施形態に係る双方向コンバータにおいて、第1の実施形態に係るコンバータと符号が同じ構成要素は、相互に同一のものを示すものとする。ここでは、主に第1の実施形態に係るコンバータと異なる構成及び動作について説明する。
(Second Embodiment)
FIG. 5 shows an electric circuit diagram of the bidirectional converter according to the second embodiment of the present invention. In the bidirectional converter according to the second embodiment of the present invention, components having the same reference numerals as those of the converter according to the first embodiment indicate the same components. Here, the configuration and operation different from those of the converter according to the first embodiment will be mainly described.
 第2の実施形態に係る双方向コンバータでは、双方向で動作させるため、第2回路は、第1回路と同様の構成になるようにする。このため、図5では、第2回路22は、スイッチング素子を2つのレグの上下アームとした回路構造にする。また、第2回路22のスイッチング素子S7、S8にも駆動信号を与えることからも、ここでは、制御回路23とする。なお、第1回路1の第1レグ12、第2レグ13及び第2回路22の第3レグ14については、第1の実施形態で述べた図1に示す構成と同様である。また、図1と同様に、図5では、インダクタンス手段Lは、1次巻線11a側に接続されているが、2次巻線11b側に接続させてもよい。 In the bidirectional converter according to the second embodiment, the second circuit is configured in the same manner as the first circuit in order to operate in both directions. For this reason, in FIG. 5, the second circuit 22 has a circuit structure in which the switching elements are upper and lower arms of two legs. In addition, since the drive signal is also given to the switching elements S7 and S8 of the second circuit 22, the control circuit 23 is used here. The first leg 12, the second leg 13 and the third leg 14 of the second circuit 22 of the first circuit 1 are the same as the configuration shown in FIG. 1 described in the first embodiment. Further, as in FIG. 1, in FIG. 5, the inductance means L is connected to the primary winding 11a side, but may be connected to the secondary winding 11b side.
 第1回路1で組となる第1回路1のスイッチング素子S1とS4、S2とS3のうち、先にオフさせる一方のレグの上下アーム、ここでは第1レグ12の上下アームのスイッチング素子S3、S4が直列に接続される。先にオフさせる第1回路1のスイッチング素子S3、S4には、それぞれ第1、第2コンデンサCa、Cbが並列に接続される。 Of the switching elements S1 and S4 and S2 and S3 of the first circuit 1 paired with the first circuit 1, the upper and lower arms of one leg that is turned off first, here the switching elements S3 of the upper and lower arms of the first leg 12, S4 is connected in series. First and second capacitors Ca and Cb are connected in parallel to the switching elements S3 and S4 of the first circuit 1 to be turned off first.
 図5に示すように、第2回路22の第3レグ24、第4レグ25は、第3端子T3と第4端子T4との間にそれぞれ並列に接続される。第3レグ24、第4レグ25は、上下アームをスイッチング素子S5~S8で構成したフルブリッジ接続の回路となる。また、スイッチング素子S5~S8は、スイッチ素子Q5~Q8と一方向性素子D5~D8と並列コンデンサC5~C8とがそれぞれ並列に接続される。なお、第1の実施形態と同様に、一方向性素子D5~D8は、図5に示したように第2回路22のスイッチング素子S5~S8の内蔵ダイオードを用いてもよく、第2回路22のスイッチング素子S5~S8とは別に外付けされたダイオードを用いてもよく、またはこれらの組み合わせであってもよい。同様に、並列コンデンサC5~C8は、図5に示したように第2回路22のスイッチング素子S5~S8の寄生容量を用いてもよく、第2回路22のスイッチング素子S5~S8とは別に外付けされたコンデンサを用いてもよく、またはこれらの組み合わせであってもよい。 As shown in FIG. 5, the third leg 24 and the fourth leg 25 of the second circuit 22 are respectively connected in parallel between the third terminal T3 and the fourth terminal T4. The third leg 24 and the fourth leg 25 are full-bridge connection circuits in which the upper and lower arms are configured by the switching elements S5 to S8. The switching elements S5 to S8 are connected in parallel with switching elements Q5 to Q8, unidirectional elements D5 to D8, and parallel capacitors C5 to C8, respectively. As in the first embodiment, the unidirectional elements D5 to D8 may use the built-in diodes of the switching elements S5 to S8 of the second circuit 22 as shown in FIG. In addition to the switching elements S5 to S8, an externally attached diode may be used, or a combination thereof may be used. Similarly, the parallel capacitors C5 to C8 may use the parasitic capacitances of the switching elements S5 to S8 of the second circuit 22 as shown in FIG. 5, and are separated from the switching elements S5 to S8 of the second circuit 22. An attached capacitor may be used, or a combination thereof.
 第2回路22から第1回路1側へ電力を供給する場合に、第2回路22で組となるスイッチング素子S5とS8、S6とS7のうち、先にオフさせる一方のレグの上下アーム、ここでは第3レグ24の上下アームのスイッチング素子S5、S6が直列に接続される。また先にオフさせるスイッチング素子S5、S6には、それぞれ第3、第4コンデンサCc、Cdが並列に接続される。 When supplying power from the second circuit 22 to the first circuit 1, the upper and lower arms of one leg of the switching elements S5 and S8 and S6 and S7 that are paired in the second circuit 22 that are turned off first, Then, the switching elements S5 and S6 of the upper and lower arms of the third leg 24 are connected in series. Further, third and fourth capacitors Cc and Cd are connected in parallel to the switching elements S5 and S6 that are turned off first.
 第1回路1から第2回路22側へ電力を供給する場合は、上記の実施形態1で述べたのと同様の動作を行う。また、第2回路22から第1回路1側へ電力を供給する場合、制御回路23は、第2回路22で組となるスイッチング素子S5とS8、S6とS7のうち、第3、第4コンデンサCc,Cdがそれぞれ並列に接続されたスイッチング素子S5、S6を先にオフさせる。第2回路22の組となるスイッチング素子S5とS8又はS6とS7とが共にオンしている時間の割合が小さい場合には、第2回路22の組となるスイッチング素子のうち先にオフさせるスイッチング素子S5又はS6をオフさせた後に、トランス11の励磁電流が2次巻線11bと後からオフさせるスイッチング素子S8又はS7とを有する2次側循環経路に流れている間にスイッチング素子S4又はS3を順方向に導通させる。そして、後からオフさせるスイッチング素子S8又はS7をオフする前に、スイッチング素子S4又はS3をオフすることによって1次巻線11a側のコンデンサC3、第1のコンデンサCa、コンデンサC4、第2のコンデンサCbの合成容量とインダクタLとの共振動作を利用して、コンデンサC7、C8の充放電の時に2次側循環経路に流れる電流を大きくする。2次側循環経路に流れる電流を大きくすることで、並列コンデンサC8又はC7をゼロ電圧になるまで放電させることができるので、後からオフさせるスイッチング素子S8又はS7のゼロ電圧スイッチングを実現できる。 When supplying power from the first circuit 1 to the second circuit 22 side, the same operation as described in the first embodiment is performed. When power is supplied from the second circuit 22 to the first circuit 1 side, the control circuit 23 includes the third and fourth capacitors among the switching elements S5 and S8 and S6 and S7 that form a pair in the second circuit 22. The switching elements S5 and S6 to which Cc and Cd are respectively connected in parallel are turned off first. When the ratio of the time during which both of the switching elements S5 and S8 or S6 and S7 that are a set of the second circuit 22 are on is small, the switching that is turned off first among the switching elements that are the set of the second circuit 22 After the element S5 or S6 is turned off, the switching element S4 or S3 while the exciting current of the transformer 11 flows through the secondary circulation path having the secondary winding 11b and the switching element S8 or S7 to be turned off later. In the forward direction. Then, before turning off the switching element S8 or S7 to be turned off later, the switching element S4 or S3 is turned off to turn off the capacitor C3 on the primary winding 11a side, the first capacitor Ca, the capacitor C4, and the second capacitor. Utilizing the resonance operation of the combined capacitance of Cb and the inductor L, the current flowing through the secondary-side circulation path when charging and discharging the capacitors C7 and C8 is increased. By increasing the current flowing through the secondary circulation path, the parallel capacitor C8 or C7 can be discharged until it reaches zero voltage, so that zero voltage switching of the switching element S8 or S7 that is turned off later can be realized.
 第1の実施形態と同様に、第2回路22又は第1回路1の一方向性素子(逆並列ダイオード)D5、D6又は逆並列ダイオードD3、D4が順方向導通する期間にスイッチング素子S5、S6又はS3、S4にオン信号を与えて同期整流を行ってもよい。通常、逆方向導通時のスイッチ素子Q5、Q6の電圧降下は一方向性素子D5、D6の順方向導通時の電圧降下よりも小さいので、スイッチ素子Q5、Q6を逆方向に導通させることによりの導通損失を低減させることができる。第1回路1の逆並列ダイオードD3、D4及びスイッチ素子Q3、Q4についても同様である。また、第2回路22のスイッチング素子S7、S8又は第1回路1のスイッチング素子S1、S2についても同様に、一方向性素子(逆並列ダイオード)D7、D8又は逆並列ダイオードD1、D2が順方向導通する期間に逆方向導通時の電圧降下が小さいスイッチ素子Q7、Q8又はQ1、Q2を逆方向に導通させることで導通損失の低減を図ることができる。 Similar to the first embodiment, the switching elements S5, S6 are in a period in which the unidirectional elements (antiparallel diodes) D5, D6 or the antiparallel diodes D3, D4 of the second circuit 22 or the first circuit 1 are forward-conductive. Alternatively, synchronous rectification may be performed by giving an ON signal to S3 and S4. Normally, the voltage drop of the switch elements Q5 and Q6 during reverse conduction is smaller than the voltage drop during forward conduction of the unidirectional elements D5 and D6, so that by switching the switch elements Q5 and Q6 in the reverse direction, The conduction loss can be reduced. The same applies to the antiparallel diodes D3 and D4 and the switch elements Q3 and Q4 of the first circuit 1. Similarly, the switching elements S7 and S8 of the second circuit 22 or the switching elements S1 and S2 of the first circuit 1 have the unidirectional elements (antiparallel diodes) D7 and D8 or the antiparallel diodes D1 and D2 in the forward direction. The conduction loss can be reduced by conducting the switch elements Q7, Q8 or Q1, Q2 having a small voltage drop during reverse conduction during the conduction period in the reverse direction.
 上述のように本発明では、後にオフさせる第1回路1のスイッチング素子S1、S2又は第2回路22のスイッチング素子S7、S8をオフさせた時の電流を、第2回路のコンデンサ又は第1回路のコンデンサとインダクタンス手段Lとの共振動作により大きくすることによって、後にオフさせる第1回路1のスイッチング素子S1、S2又は第2回路22のスイッチング素子S7、S8についてゼロ電圧スイッチングを実現させ、オフ時に生じるスイッチング損失を低減させている。 As described above, in the present invention, the current when the switching elements S1 and S2 of the first circuit 1 or the switching elements S7 and S8 of the second circuit 22 to be turned off later is turned off is used as the capacitor of the second circuit or the first circuit. The zero voltage switching is realized for the switching elements S1 and S2 of the first circuit 1 or the switching elements S7 and S8 of the second circuit 22 to be turned off later by increasing the resonance by the resonance operation of the capacitor and the inductance means L. The resulting switching loss is reduced.
 また、本発明に係るコンバータ及び双方向コンバータでは、制御回路3、23が、第1回路1又は第2回路22のスイッチング素子のパルス幅や周波数を変調させ、出力側の第2回路22又は第1回路1ではスイッチング素子のオンオフのタイミングを変えることで広範囲な入出力電圧電流に対応させることができる。さらに、入力側の第1又は第2回路の組となるスイッチ素子のうち、先にオフさせるスイッチ素子に並列に接続されるコンデンサの容量が、後にオフさせるスイッチ素子に並列に接続されるコンデンサの容量よりも大きくすることで第1回路又は第2回路のスイッチング素子のオフ時に生じるスイッチング損失を低減させることができる。同様に、オンオフさせる出力側の第2回路又は第1回路のスイッチング素子についても並列にコンデンサを接続することでオフ時に生じるスイッチング損失を低減させることができる。 In the converter and the bidirectional converter according to the present invention, the control circuits 3 and 23 modulate the pulse width and frequency of the switching element of the first circuit 1 or the second circuit 22, and the second circuit 22 or the second circuit on the output side. In one circuit 1, it is possible to deal with a wide range of input / output voltage currents by changing the on / off timing of the switching elements. Furthermore, among the switch elements that form the first or second circuit set on the input side, the capacitance of the capacitor that is connected in parallel to the switch element that is turned off first is the capacitance of the capacitor that is connected in parallel to the switch element that is turned off later. By making it larger than the capacitance, it is possible to reduce the switching loss that occurs when the switching element of the first circuit or the second circuit is turned off. Similarly, the switching loss generated at the time of OFF can be reduced by connecting a capacitor in parallel with the switching element of the output-side second circuit or the first circuit to be turned ON / OFF.
 なお、第1回路1のスイッチング素子S1、S2を共にオフさせる期間Tdを大きな値に設定すると、スイッチング素子S1又はS2の両端電圧がゼロまで下がった後に再度電圧が上昇してしまう、つまりコンデンサC1又はC2がゼロまで放電された後に充電されてしまうことがある。このため、スイッチング素子S1、S2を共にオフさせる期間Tdは、スイッチング素子S1又はS2の両端電圧がゼロまで下がる期間程度とするのが好ましい。第2回路22のスイッチング素子S7、S8についても同様である。また、後にオフさせるスイッチ素子Q1,Q2に並列に接続されるコンデンサの容量の並列コンデンサC1,C2は、第1回路1のスイッチング素子S1、S2内蔵の寄生容量の場合など小さい容量値となり、部品によってはバラツキがある。このため、第1回路1のスイッチング素子S1、S2内蔵の寄生容量に別付けのコンデンサを並列に接続させ、これらの合成容量を上記並列コンデンサC1,C2としてもよい。第2回路22の並列コンデンサC7、C8についても同様である。 If the period Td during which both the switching elements S1 and S2 of the first circuit 1 are turned off is set to a large value, the voltage rises again after the voltage across the switching element S1 or S2 drops to zero, that is, the capacitor C1. Or it may be charged after C2 is discharged to zero. For this reason, it is preferable that the period Td during which both the switching elements S1 and S2 are turned off is set to a period during which the voltage across the switching element S1 or S2 drops to zero. The same applies to the switching elements S7 and S8 of the second circuit 22. Further, the parallel capacitors C1 and C2 having the capacitance of the capacitors connected in parallel to the switch elements Q1 and Q2 to be turned off later have a small capacitance value such as in the case of the parasitic capacitance built in the switching elements S1 and S2 of the first circuit 1, There are variations. For this reason, a separate capacitor may be connected in parallel to the parasitic capacitances built in the switching elements S1 and S2 of the first circuit 1, and these combined capacitors may be used as the parallel capacitors C1 and C2. The same applies to the parallel capacitors C7 and C8 of the second circuit 22.
 本発明では、上述の説明において、励磁電流を適切な大きさにするためにトランス11の1次巻線又は2次巻線に並列に設けられるインダクタンス成分も上述のトランス11の励磁インダクタンスに含まれる。また、上述の説明において、トランス11の励磁インダクタンスとこれに並列に設けられるインダクタンス成分とによる合成インダクタンスによって流れる電流も上述の励磁電流に含まれる。トランス11の励磁インダクタンスは、トランスの構造において、例えば、コアのギャップ幅、巻線の巻数量、コアの材質などによって調整することができる。 In the present invention, in the above description, an inductance component provided in parallel with the primary winding or the secondary winding of the transformer 11 in order to make the excitation current have an appropriate magnitude is also included in the excitation inductance of the transformer 11 described above. . In the above description, the current that flows due to the combined inductance of the exciting inductance of the transformer 11 and the inductance component provided in parallel with the transformer 11 is also included in the above-described exciting current. The excitation inductance of the transformer 11 can be adjusted in the transformer structure by, for example, the gap width of the core, the number of windings, the core material, and the like.
 上記の第1、第2の実施形態では、制御回路3、23は、第2回路の出力電圧検出手段18、第1回路の出力電圧検出手段19によって検出された電圧値が目標値に近づくようにしているが、用いる検出値は出力電流値や出力電力の他にこれらの組み合わせであってもよい。同様に入力側の電圧、電流又は電力の検出値が目標値に近づくようにしてもよい。なお、一般的に、電力の検出値としては、検出された電圧及び電流を乗算した演算値を用いる。上述の出力される電圧、電流もしくは電力の検出値又は入力される電圧、電流又は電力の検出値には、これらの値にある係数を乗除算したり、ある値を加減算等したりといった演算をして得られた値も含まれる。 In the first and second embodiments described above, the control circuits 3 and 23 allow the voltage values detected by the output voltage detection means 18 of the second circuit and the output voltage detection means 19 of the first circuit to approach the target values. However, the detection value to be used may be a combination of these in addition to the output current value and the output power. Similarly, the detected value of voltage, current, or power on the input side may approach the target value. In general, a calculated value obtained by multiplying the detected voltage and current is used as the detected power value. The above output voltage, current or power detection value or input voltage, current or power detection value is calculated by multiplying or dividing a certain coefficient by these values or adding or subtracting a certain value. The value obtained in this way is also included.
 本発明の電気回路において、接続点とは電気的に接続されて同電位にある部位を言い、物理的に接続された点を言うものではない。また、本発明のコンバータ及び双方向コンバータにおける各部の構成、構造、数、配置、形状、材質などに関しては、上記具体例に限定されず、当業者が適宜選択的に採用したものも、本発明の要旨を包含する限り、本発明の範囲に包含される。 In the electric circuit of the present invention, the connection point means a part that is electrically connected and at the same potential, and does not mean a point that is physically connected. Further, the configuration, structure, number, arrangement, shape, material, and the like of each part in the converter and the bidirectional converter according to the present invention are not limited to the above-described specific examples, and those appropriately adopted by those skilled in the art are also included in the present invention. As long as the gist of the present invention is included, it is included in the scope of the present invention.
 より具体的には、例えば、半導体素子として記号により例示したものなどは、これら特定の電気素子には限定されず、同様の機能または作用を有する単一の電気素子あるいは複数の電気素子を含む電気回路として構成することができ、これらすべての変形は、本発明の範囲に包含される。同様に、ダイオード、コンデンサ、スイッチング素子をはじめとする各回路素子の数や配置関係などについても、当業者が適宜設計変更したものは本発明の範囲に包含される。 More specifically, for example, the semiconductor elements illustrated by symbols are not limited to these specific electric elements, but include an electric element including a single electric element or a plurality of electric elements having the same function or action. All of these variations are included within the scope of the present invention. Similarly, the number and arrangement of circuit elements including diodes, capacitors, and switching elements that are appropriately designed by those skilled in the art are included in the scope of the present invention.
T1・・・第1端子、T2・・・第2端子、T3・・・第3端子、T4・・・第4端子、1・・・第1回路、2、22・・・第2回路、3、23・・・制御回路、11・・・トランス、12・・・第1レグ、13・・・第2レグ、24・・・第3レグ、25・・・第4レグ、16、17・・・コンデンサ、18・・・第2回路の出力電圧検出手段、19・・・第1回路の出力電圧検出手段、S1~S4・・・第1回路のスイッチング素子、Q1~Q4・・・スイッチ素子、D1~D4・・・逆並列ダイオード、C1~C4・・・並列コンデンサ、D5~D8・・・一方向性素子(逆並列ダイオード)、S5~S8・・・第2回路のスイッチング素子、Q5~Q8・・・スイッチ素子、C5~C8・・・並列コンデンサ、Ca~Cd・・・第1~第4コンデンサ、L・・・インダクタンス手段 T1 ... 1st terminal, T2 ... 2nd terminal, T3 ... 3rd terminal, T4 ... 4th terminal, 1 ... 1st circuit, 2, 22 ... 2nd circuit, 3, 23 ... control circuit, 11 ... transformer, 12 ... first leg, 13 ... second leg, 24 ... third leg, 25 ... fourth leg, 16, 17 ... Capacitors, 18 ... Output voltage detection means of the second circuit, 19 ... Output voltage detection means of the first circuit, S1 to S4 ... Switching elements of the first circuit, Q1 to Q4 ... Switch elements, D1 to D4 ... antiparallel diodes, C1 to C4 ... parallel capacitors, D5 to D8 ... unidirectional elements (antiparallel diodes), S5 to S8 ... switching elements of the second circuit , Q5 to Q8... Switch element, C5 to C8... Parallel capacitor, Ca to Cd. The fourth capacitor, L ··· inductance means

Claims (4)

  1.  1次巻線と2次巻線とを有するトランスと、
     逆並列ダイオードと並列コンデンサとがそれぞれ並列に接続されたスイッチ素子を有するスイッチング素子を上下アームとして第1端子と第2端子との間にそれぞれ並列に接続された第1レグと第2レグと、前記第1レグもしくは第2レグの上下アームの一方のスイッチング素子又は前記第1レグ及び第2レグの上アームもしくは下アームの一方のスイッチング素子に並列に接続される第1コンデンサと、前記第1レグもしくは第2レグの上下アームの他方のスイッチング素子又は前記第1レグ及び第2レグの上アームもしくは下アームの他方のスイッチング素子に並列に接続される第2コンデンサとを有し、前記1次巻線側に接続される第1回路と、
     ブリッジ接続される一方向性素子のうち少なくとも2つの前記一方向性素子は並列コンデンサがそれぞれ並列に接続されたスイッチ素子を含むスイッチング素子がそれぞれ並列に接続されるブリッジ接続回路と、前記ブリッジ接続回路内の少なくとも2つの前記スイッチング素子にそれぞれ並列に接続される第3コンデンサと第4コンデンサとを有し、前記2次巻線側に接続される第2回路と、
     前記第1レグの上下アームの接続点側と前記第2レグの上下アームの接続点側との間に前記1次巻線を介して又は前記ブリッジ接続回路内で前記一方向性素子同士が同じ極性で直列に接続される接続点側と前記一方向性素子同士が同じ極性で直列に接続される他方の接続点側との間に前記2次巻線を介して接続されるインダクタンス手段と、
     前記第1又は第2レグの上アームのスイッチング素子と前記第2又は第1レグの下アームのスイッチング素子とを組にして交互にオンオフさせて前記第1、第2端子側から入力される直流を交流に変換させて前記第1回路から出力させ、前記組となるスイッチング素子を交互にオンオフ制御するにあたり、オン状態にある前記組となる前記第1又は第2レグの上アームのスイッチング素子と前記第2又は第1レグの下アームのスイッチング素子のうち前記第1又は第2コンデンサが並列に接続されたスイッチング素子を先にオフさせた後、前記トランスの励磁電流が前記1次巻線と後からオフさせる前記スイッチング素子とを有する1次側循環経路に流れている間に前記第2回路の前記第3又は第4コンデンサが並列に接続されたスイッチ素子を順方向に導通させてからオフし、前記第3コンデンサとこれに並列に接続される前記並列コンデンサと前記第4コンデンサとこれに並列に接続される前記並列コンデンサと前記インダクタンス手段とによる共振作用の影響によって重畳されたことによる前記励磁電流よりも大きい電流を前記1次側循環経路に流す制御回路とを備えることを特徴とするコンバータ。
    A transformer having a primary winding and a secondary winding;
    A first leg and a second leg connected in parallel between a first terminal and a second terminal, respectively, with a switching element having a switching element in which an anti-parallel diode and a parallel capacitor are connected in parallel; A first capacitor connected in parallel to one switching element of the upper and lower arms of the first leg or the second leg or one switching element of the upper arm or the lower arm of the first leg and the second leg; A second capacitor connected in parallel to the other switching element of the upper arm of the leg or the second leg or the other switching element of the upper arm or the lower arm of the first leg and the second leg, and A first circuit connected to the winding side;
    At least two of the unidirectional elements to be bridge-connected include a bridge connection circuit in which switching elements including switching elements each having a parallel capacitor connected in parallel are connected in parallel, and the bridge connection circuit A second capacitor connected to the secondary winding side, and having a third capacitor and a fourth capacitor connected in parallel to at least two of the switching elements,
    The unidirectional elements are the same between the connection point side of the upper and lower arms of the first leg and the connection point side of the upper and lower arms of the second leg through the primary winding or in the bridge connection circuit. Inductance means connected via the secondary winding between a connection point side connected in series with polarity and the other connection point side where the unidirectional elements are connected in series with the same polarity;
    Direct current input from the first and second terminal sides by alternately switching on and off the switching element of the upper arm of the first or second leg and the switching element of the lower arm of the second or first leg. Is converted into alternating current and output from the first circuit, and the switching elements in the set are alternately turned on and off, and the switching elements of the upper arm of the first or second leg in the set in the on state After switching off the switching element having the first or second capacitor connected in parallel among the switching elements of the lower arm of the second or first leg, the exciting current of the transformer is connected to the primary winding. A switch element in which the third or fourth capacitor of the second circuit is connected in parallel while flowing in a primary-side circulation path having the switching element to be turned off later. The third capacitor, the parallel capacitor connected in parallel to the third capacitor, the fourth capacitor, the parallel capacitor connected in parallel to the third capacitor, and the inductance means are turned off. And a control circuit for flowing a current larger than the excitation current caused by the influence of the current to the primary-side circulation path.
  2.  前記制御回路は、前記第3又は第4コンデンサが並列に接続された一方向性素子が導通しているときに該一方向性素子と並列に接続された前記スイッチング素子にオン信号を与えることを特徴とする請求項1に記載のコンバータ。 The control circuit gives an ON signal to the switching element connected in parallel with the unidirectional element when the unidirectional element connected in parallel with the third or fourth capacitor is conducting. The converter according to claim 1, characterized in that:
  3.  前記第1回路の前記スイッチング素子のスイッチ素子に並列に接続された前記逆並列ダイオードは、前記第1回路のスイッチング素子の内蔵ダイオード、前記第1回路のスイッチング素子とは別に外付けされたダイオード、又はこれらを組み合わせたものであり、前記第1回路の前記スイッチング素子のスイッチ素子に並列に接続された前記並列コンデンサは、前記第1回路のスイッチング素子の寄生容量、前記第1回路のスイッチング素子とは別に外付けされたコンデンサ、又はこれらを組み合わせたものであり、
     前記第2回路の前記スイッチング素子のスイッチ素子に並列に接続された前記一方向性素子は、前記第2回路のスイッチング素子の内蔵ダイオード、前記第2回路のスイッチング素子とは別に外付けされるダイオード、又はこれらを組み合わせものであり、前記第2回路の前記スイッチング素子のスイッチ素子に並列に接続された並列コンデンサは、前記第2回路のスイッチング素子の寄生容量、前記第2回路のスイッチング素子とに別に外付けされるコンデンサ、又はこれらを組み合わせものであることを特徴とする請求項1又は請求項2に記載のコンバータ。
    The anti-parallel diode connected in parallel to the switching element of the switching element of the first circuit includes a built-in diode of the switching element of the first circuit, a diode externally attached separately from the switching element of the first circuit, Or a combination thereof, and the parallel capacitor connected in parallel to the switching element of the switching element of the first circuit includes a parasitic capacitance of the switching element of the first circuit, and a switching element of the first circuit. Is a separate external capacitor, or a combination of these,
    The unidirectional element connected in parallel to the switching element of the switching element of the second circuit includes a built-in diode of the switching element of the second circuit and an external diode separately from the switching element of the second circuit Or a combination thereof, and a parallel capacitor connected in parallel to the switching element of the switching element of the second circuit is connected to the parasitic capacitance of the switching element of the second circuit and the switching element of the second circuit. The converter according to claim 1, wherein the converter is a separately attached capacitor, or a combination thereof.
  4.  前記第1回路の前記第1又は第2レグの上下アームとして前記第1コンデンサが並列に接続された前記第1回路のスイッチング素子と前記第2コンデンサが並列に接続された前記第1回路のスイッチング素子とが接続され、
     前記第2回路の前記ブリッジ接続回路は前記一方向性素子と前記並列コンデンサとがそれぞれ並列に接続された前記スイッチ素子を有する前記第2回路のスイッチング素子を上下アームとして第3端子と第4端子との間にそれぞれ並列に接続された第3レグと第4レグで構成され、前記第3又は第4レグの上下アームとして前記第3コンデンサが並列に接続された前記第2回路のスイッチング素子と前記第4コンデンサが並列に接続された前記第2回路のスイッチング素子とが接続され、
     前記制御回路は、前記第3又は第4レグの上アームの第2回路のスイッチング素子と前記第4又は第3レグの下アームの第2回路のスイッチング素子とを組にして交互にオンオフさせて前記第3、第4端子側から入力される直流を交流に変換させて前記第2回路から出力させ、前記組となる第2回路のスイッチング素子を交互にオンオフ制御するにあたり、オン状態にある前記組となる第3又は第4レグの上アームの第2回路のスイッチング素子と第4又は第3レグの下アームの第2回路のスイッチング素子とのうち前記第3又は第4コンデンサが並列に接続された第2回路のスイッチング素子を先にオフさせた後、前記トランスの励磁電流が前記2次巻線と後からオフさせる前記第2回路のスイッチング素子とを有する2次側循環経路に流れている間に前記第1回路の前記第1又は第2コンデンサが並列に接続されたスイッチ素子を順方向に導通させてからオフし、前記第1コンデンサとこれに並列に接続される前記並列コンデンサと前記第2コンデンサとこれに並列に接続される前記並列コンデンサと前記インダクタンス手段とによる共振作用の影響によって重畳させたことによる前記励磁電流よりも大きい電流を前記2次側循環経路に流すことを特徴とする請求項1から請求項3のいずれかに記載のコンバータを備えた双方向コンバータ。
    Switching of the first circuit in which the first capacitor is connected in parallel with the first capacitor as the upper and lower arms of the first or second leg of the first circuit and the second circuit in which the second capacitor is connected in parallel The device is connected,
    The bridge connection circuit of the second circuit includes the switch element in which the unidirectional element and the parallel capacitor are connected in parallel, and the switching element of the second circuit is an upper and lower arm, and a third terminal and a fourth terminal And a switching element of the second circuit, wherein the third capacitor is connected in parallel as upper and lower arms of the third or fourth leg, respectively. A switching element of the second circuit to which the fourth capacitor is connected in parallel;
    The control circuit alternately turns on and off a pair of switching elements of the second circuit of the upper arm of the third or fourth leg and switching elements of the second circuit of the lower arm of the fourth or third leg. The direct current input from the third and fourth terminal sides is converted into alternating current and output from the second circuit, and the on-off control is alternately performed on the switching elements of the second circuit in the set. The third or fourth capacitor is connected in parallel between the switching element of the second circuit of the upper arm of the third or fourth leg and the switching element of the second circuit of the lower arm of the fourth or third leg forming a set. After the switching element of the second circuit is turned off first, the exciting current of the transformer flows into the secondary side circulation path having the secondary winding and the switching element of the second circuit to be turned off later. During this time, the switch element in which the first or second capacitor of the first circuit is connected in parallel is made to conduct in the forward direction and then turned off, and the first capacitor and the parallel capacitor connected in parallel to the first capacitor And flowing a current larger than the excitation current caused by the resonance effect of the second capacitor, the parallel capacitor connected in parallel to the capacitor, and the inductance means to the secondary circulation path. A bidirectional converter comprising the converter according to any one of claims 1 to 3.
PCT/JP2013/084262 2012-12-21 2013-12-20 Converter, and bidirectional converter WO2014098221A1 (en)

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