WO2014196833A1 - Light-emitting device - Google Patents

Light-emitting device Download PDF

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Publication number
WO2014196833A1
WO2014196833A1 PCT/KR2014/005020 KR2014005020W WO2014196833A1 WO 2014196833 A1 WO2014196833 A1 WO 2014196833A1 KR 2014005020 W KR2014005020 W KR 2014005020W WO 2014196833 A1 WO2014196833 A1 WO 2014196833A1
Authority
WO
WIPO (PCT)
Prior art keywords
conductive
conductive upper
pattern
light emitting
emitting device
Prior art date
Application number
PCT/KR2014/005020
Other languages
French (fr)
Korean (ko)
Inventor
박재현
표병기
Original Assignee
서울반도체 주식회사
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR20140064659A external-priority patent/KR20140143701A/en
Application filed by 서울반도체 주식회사 filed Critical 서울반도체 주식회사
Priority to CN201480040661.5A priority Critical patent/CN105378953B/en
Priority to US14/896,558 priority patent/US20160126437A1/en
Publication of WO2014196833A1 publication Critical patent/WO2014196833A1/en
Priority to US15/398,290 priority patent/US20170117452A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/483—Containers
    • H01L33/486—Containers adapted for surface mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12041—LED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0033—Processes relating to semiconductor body packages
    • H01L2933/0066—Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/52—Encapsulations
    • H01L33/54—Encapsulations having a particular shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/64—Heat extraction or cooling elements
    • H01L33/647—Heat extraction or cooling elements the elements conducting electric current to or from the semiconductor body

Definitions

  • the present invention relates to a light emitting device, and in particular, to a light emitting device that is easy to manufacture thin and maximize light efficiency and heat dissipation.
  • a light emitting diode chip is an electroluminescence device that emits light by a forward current.
  • Compound semiconductors such as indium phosphorus (InP), gallium arsenide (GaAs), and gallium phosphorus (GaP) have been used as materials for light emitting diode chips emitting red or green light, and gallium nitride (GaN) -based compound semiconductors It has been developed and used as a material of a light emitting device that emits ultraviolet light and blue light.
  • the light emitting diode chip is widely used in various display devices, backlight sources, and the like.
  • a light emitting diode chip emits white light by using three light emitting diode chips emitting red, green, and blue light, or by converting a wavelength using a phosphor. It has been developed to expand the scope of application to lighting devices.
  • a light emitting diode chip is mounted in a recess region formed by a partition on a substrate including a lead frame, and an encapsulation portion containing a fluorescent material is filled in the recess region to form one light emitting package.
  • a plurality of light emitting packages may be mounted on a circuit board and used as one light emitting device.
  • a general light emitting device is manufactured by mounting a light emitting package on a circuit board after mounting a light emitting diode chip by manufacturing a substrate having a partition and a lead frame as described above. There was.
  • the general light emitting device has a structural problem that a failure occurs due to the inflow of moisture due to the surface adhesion characteristics deterioration because the barrier rib and the substrate are manufactured by using a mold resin in a metal lead frame.
  • the problem to be solved by the present invention is to provide a light emitting device that can maximize the light efficiency and heat dissipation and at the same time easy to manufacture thin.
  • Another object of the present invention is to provide a light emitting device that can reduce manufacturing costs.
  • a light emitting device includes a film including a plurality of holes; A conductive upper pattern covering the plurality of holes; A conductive lower pattern extending from the conductive upper pattern and accommodated in the hole; A bridge unit connecting the conductive upper patterns adjacent to each other; And a light emitting diode chip mounted on each of the conductive upper patterns.
  • the plurality of holes are formed in a matrix form on the film.
  • the bridge portion connects the conductive upper patterns adjacent in the first direction, and the conductive upper patterns adjacent in the second direction perpendicular to the first direction are spaced apart from each other by a predetermined interval.
  • the film includes a plurality of unit cells, the conductive upper pattern includes first and second conductive upper patterns, and the first and second conductive upper patterns are separated from each other based on one unit cell.
  • the first and second conductive upper patterns are shared with each other based on adjacent unit cells in a second direction.
  • the projection unit further includes a protrusion to limit a region where the lens unit is formed.
  • the protrusions may be composed of a plurality of layers, have a narrower area toward the upper layer, and have a stepped structure on the inner side thereof.
  • a molding part is further included in the protrusion, and the molding part further includes a fluorescent material.
  • the bridge portion is smaller than or equal to the width of the conductive upper pattern in the second direction and larger than the radius of the lens portion.
  • the conductive lower pattern includes first and second regions having different widths in a second direction.
  • the width of the second region is greater than the width of the first region, the width of the first region is 80% or more of the width of the second region, and the first region is a region in which the LED chip is mounted.
  • the conductive upper pattern and the conductive lower pattern are exposed at both sides corresponding to the second direction of the unit cell light emitting device.
  • the bridge portion is exposed to both opposite sides corresponding to the first direction of the unit cell light emitting device, and the brit portion and the conductive upper pattern are connected to each other along the side of the unit cell light emitting device.
  • the film is composed of a plurality of unit cells, the plurality of holes is made of a pair of first and second holes per one unit cell, the conductive upper pattern comprises a first and second conductive upper pattern, one
  • the first and second conductive upper patterns may include boundary regions spaced apart from each other, and the boundary regions may be disposed between the first and second holes.
  • the boundary region is formed in a direction parallel to a diagonal direction in the one unit cell.
  • the first hole has three inner surfaces, and the second hole has five inner surfaces.
  • a light emitting device in another embodiment, includes: a first conductive lower pattern and a second conductive lower pattern spaced apart in a first direction; A first conductive upper pattern and a second conductive upper pattern respectively positioned on the first conductive lower pattern and the second conductive lower pattern; An insulating part disposed between the first conductive lower pattern and the second conductive lower pattern; A first bridge portion extending from the first conductive upper pattern in a second direction perpendicular to the first direction; A second bridge portion extending from the second conductive upper pattern in the second direction; And a light emitting diode chip mounted on the first conductive upper pattern.
  • a reflector covering a portion of the first bridge portion, the second bridge portion, the first conductive upper pattern and the second conductive upper pattern; And a lens unit positioned on the reflecting unit.
  • each of the first bridge portion and the second bridge portion is less than or equal to the width of each of the first conductive upper pattern and the second conductive upper pattern in the first direction, and larger than the radius of the lens portion.
  • the second conductive lower pattern includes a first region and a second region having different areas in the first direction, and the first and second regions have different widths in the second direction, and the second region Is greater than the width of the first region, the width of the first region is at least 80% of the width of the second region, and the light emitting diode chip is mounted in a region overlapping the first region.
  • the first conductive upper pattern, the second conductive upper pattern, the first conductive lower pattern, and the second conductive lower pattern have side surfaces exposed to both sides corresponding to the first direction.
  • the exposed side of the first bridge portion and the exposed side of the first conductive upper pattern are connected to each other, and the exposed side of the second bridge portion and the exposed side of the first conductive upper pattern are connected to each other.
  • the present invention provides a light emitting device comprising a film having a plurality of holes, a conductive upper pattern patterned on the film, and a lower portion of the conductive upper pattern and inside the plurality of holes.
  • the light emitting device can be thinned by the formed conductive lower pattern and the structure of the light emitting diode chip mounted on the conductive upper pattern.
  • the present invention prevents defects due to infiltration of moisture and foreign substances, which are introduced between the lead frame and the insulating substrate of a general light emitting device. can do.
  • the heat generated from the light emitting diode chip is easily discharged through the conductive upper pattern and the conductive lower pattern, the heat dissipation is excellent.
  • the present invention has a structure that covers the lens portion after mounting the light emitting diode chip on the conductive upper pattern of the film, the configuration is simplified and has the advantage of reducing the manufacturing cost and manufacturing time.
  • the conductive upper pattern is separated into the first and second conductive upper patterns
  • the conductive lower pattern is separated into the first and second conductive lower patterns
  • the first cell is formed in each unit cell.
  • the structure of the light emitting diode chip mounted on the conductive upper pattern has an advantage that the thickness of the light emitting device can be realized.
  • the first and second conductive upper patterns are connected by the bridge portion, the first and second conductive lower pattern regions and the cutting regions are spaced at a predetermined interval so that the cutting process is performed. It has an easy advantage.
  • the present invention is a structure in which the film wraps the first and second conductive lower pattern to the outside of the film, the first and second conductive lower pattern is not exposed to the outside of the film to prevent moisture intrusion, It has the advantage of improving the reliability by preventing deformation.
  • the bridge portion is further formed in the second direction of the first and second conductive upper patterns to improve the electrical characteristics such as line resistance during the plating process for forming the first and second conductive lower patterns, thereby improving overall uniformity. It has the advantage of being able to form first and second conductive lower patterns of one thickness.
  • the present invention has the advantage that the light extraction is improved by the protrusion consisting of a plurality of layers.
  • FIG. 1 is a plan view showing a light emitting device according to a first embodiment of the present invention.
  • FIG. 2 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
  • FIG. 3 is a cross-sectional view illustrating a light emitting device cut along the line II ′ of FIG. 1.
  • FIG. 4 is a plan view showing a light emitting device according to a second embodiment of the present invention.
  • FIG. 5 is a cross-sectional view illustrating a light emitting device cut along the line II-II ′ of FIG. 4.
  • FIG. 6 is a cross-sectional view showing a light emitting device according to a third embodiment of the present invention.
  • FIG. 7 is a plan view showing a light emitting device according to a fourth embodiment of the present invention.
  • FIG. 8 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
  • FIG. 9 is a plan view showing a light emitting device according to a fifth embodiment of the present invention.
  • FIG. 10 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
  • Figure 1 is a plan view showing a light emitting device according to a first embodiment of the present invention
  • Figure 2 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
  • FIG. 3 is a cross-sectional view illustrating a light emitting device cut along the line II ′ of FIG. 1.
  • the light emitting device has a structure in which a plurality of cells are connected.
  • the light emitting device includes a film having a plurality of holes, a plurality of conductive upper patterns 120, a plurality of conductive lower patterns 124, a plurality of light emitting diode chips 150, a reflecting unit 160, and a plurality of lens units ( 170).
  • the film includes an insulating layer 110 and a first adhesive layer 111.
  • the film has a matrix structure surrounding a plurality of holes.
  • the film may be formed through a mechanical punching process.
  • the conductive upper pattern 120 includes a bridge portion 122 covering the hole, extending over the upper surface of the film, and connecting the conductive upper patterns 120 adjacent in the first direction.
  • the conductive upper patterns 120 may be spaced apart at a predetermined interval in a second direction vertically intersecting with respect to the first direction, and the conductive upper patterns 120 adjacent to the second direction may be insulated from each other by the film. have.
  • the bridge portion 122 connecting the conductive upper patterns 120 adjacent to each other in the first direction is limited.
  • the present invention is not limited thereto.
  • a bridge part connecting the adjacent conductive upper patterns 120 in the second direction may be further formed.
  • the first and second conductive upper patterns 121 and 123 are shared between adjacent unit cells, and the first and second conductive upper patterns shared by adjacent unit cells through a cutting process. 121, 123 may be separated.
  • the conductive lower pattern 124 may be formed in the plurality of holes.
  • the conductive lower pattern 124 may be formed through a plating process from a lower surface of the conductive upper pattern 120.
  • An area of the conductive lower pattern 124 is smaller than an area of the conductive upper pattern 120.
  • the reflector 160 covers a portion of the film and the conductive upper pattern 120. Specifically, the reflector 160 is formed on the film exposed from the conductive upper pattern 120. In addition, the reflector 160 may include the conductive upper pattern except for a region in which the LED chip 150 of the conductive upper pattern 120 is mounted and a region electrically connected to the electrodes of the LED chip 150 ( 120).
  • the reflector 160 may be a resin including a reflective material having a high reflectance.
  • the reflection method 160 is not particularly limited, but may be formed by, for example, a printing process. Therefore, the reflector 160 has a predetermined thickness from the surface of the film and the conductive upper pattern 120.
  • the light emitting diode chip 150 is disposed on the conductive upper pattern 120 but is mounted on one side edge of the conductive upper pattern 120.
  • the LED chip 150 includes electrodes, and the electrodes are electrically connected to the conductive upper pattern 120 through first and second wires 151 and 152, respectively.
  • the light emitting diode chip 150 of the present invention is limited to a structure in which electrodes are electrically connected to the conductive upper pattern 120 by the first and second wires 151 and 152, but are specifically limited. Instead, various types of light emitting diode chips, such as a vertical type using one wire, can be applied.
  • the light emitting device has a scribing region SR in the form of a matrix for separating into light emitting devices of a unit cell through a cutting process.
  • the light emitting device may be separated into the light emitting device 100 of a unit cell through a cutting process.
  • the light emitting device 100 of the unit cell includes a film, a light emitting diode chip 150, first and second conductive upper patterns 121 and 123, first and second conductive lower patterns 125 and 127, and a reflector. 160 and the lens unit 170.
  • the film includes an insulating layer 110 and a first adhesive layer 111.
  • the first adhesive layer 111 is located on the insulating layer 110.
  • the first and second conductive upper patterns 121 and 123 are disposed on the first adhesive layer 111.
  • the first and second conductive upper patterns 121 and 123 are not particularly limited, but may be, for example, copper patterns.
  • First and second protective layers 131 and 133 may be formed on the first and second conductive upper patterns 121 and 123.
  • the first and second protective layers 131 and 133 have a function of protecting the first and second conductive upper patterns 121 and 123 from deformation, for example, corrosion, by contact with air.
  • the first and second protective layers 131 and 133 are made of a material capable of reflecting light.
  • the first and second protective layers 131 and 133 have an additional function of reflecting light and are not particularly limited, but may be Ag / Ni, for example.
  • the first conductive lower pattern 125 is formed under the first conductive upper pattern 121.
  • the first conductive lower pattern 125 may be formed through a plating process. That is, the first conductive lower pattern 125 may be formed on the bottom surface of the first conductive upper pattern 121. In addition, the first conductive lower pattern 125 may extend to an area corresponding to the lower surface of the film.
  • the second conductive lower pattern 127 is formed under the second conductive upper pattern 123.
  • the second conductive lower pattern 127 may be formed through a plating process. That is, the second conductive lower pattern 127 may be formed on the bottom surface of the second conductive upper pattern 123. In addition, the second conductive lower pattern 127 may extend to an area corresponding to the lower surface of the film.
  • the light emitting diode chip 150 is disposed on the first conductive upper pattern 121.
  • the light emitting diode chip 150 may be mounted on the first conductive upper pattern 121 by the second adhesive layer 140.
  • the LED chip 150 includes electrodes (not shown). One of the electrodes is electrically connected to the first conductive upper pattern 121 by a first wire 151, and the other of the electrodes is connected to the second conductive upper pattern by a second wire 152. Is electrically connected to 123.
  • the fluorescent material 180 is coated on the light emitting diode chip 150.
  • the fluorescent material 180 may be formed on the light emitting diode chip 150 through a spray process.
  • the present invention a method of forming the fluorescent material 180 by the spray process is described.
  • the present invention is not limited thereto, and spin coating, electrostatic deposition, and electrophoretic deposition may be used.
  • the first passivation layer 131 is positioned between the second adhesive layer 140 and the first conductive upper pattern 121. That is, the second adhesive layer 140 may be located between the light emitting diode chip 150 and the first passivation layer W1 disposed on the first conductive upper pattern 121.
  • the reflector 160 is formed on the first adhesive layer 111 of the film exposed from the first and second conductive upper patterns 121 and 123, and the first and second conductive upper patterns 121 and 123. It is formed in a part of the upper surface of the).
  • the reflector 160 may include a reflective material having a high reflectance or a resin having a high reflectance.
  • the lens unit 170 covers the light emitting diode chip 150 and is positioned on the reflecting unit 160.
  • the lens unit 170 may be made of a light-transmissive material, and may further include an extension part 171 covering the reflective part 160 along an edge thereof.
  • the extension part 171 may be a light transmitting material, for example, silicon.
  • the first adhesive layer 111 is coated on the insulating layer 110, and a plurality of holes are formed by a punching process.
  • first and second conductive lower patterns 125 and 127 are formed under the metal layer by a plating process.
  • the first and second conductive upper patterns 121 and 123 exposing a part of the first adhesive layer 111 are formed through a patterning process of the metal layer.
  • the exposed first adhesive layer 111 defines a boundary between the first and second conductive upper patterns 121 and 123.
  • a resin including a reflective material having a high reflectance is formed on the first and second conductive upper patterns 121 and 123 and the exposed first adhesive layer 111, and the reflector 160 is formed by a patterning process. ) Is formed.
  • first and second protective layers 131 and 133 are formed on the first and second conductive upper patterns 121 and 123 exposed from the reflector 160.
  • the LED chip 150 is mounted on the first conductive upper pattern 121 using the second adhesive layer 140, and the light emission is performed using the first and second wires 151 and 152.
  • the diode chip 150 is electrically connected to the first and second conductive upper patterns 121 and 123.
  • the fluorescent material 180 is formed on the light emitting diode chip 150 using a spray process on the light emitting diode chip 150.
  • the fluorescent material 180 may be limitedly formed around the light emitting diode chip 150 using a mask (not shown).
  • the fluorescent material 180 has a uniform thickness as a whole.
  • the lens unit 170 covering the LED chip 150 is formed.
  • the present invention is not limited thereto and may be mixed inside the lens unit 170, or It may be formed on the surface of the lens unit 170.
  • the fluorescent material formed inside or on the surface of the lens unit 170 has a uniform thickness as a whole.
  • the light emitting device of the present invention includes a film having a plurality of holes, a conductive upper pattern 120 patterned on the film, a lower portion of the conductive upper pattern 120, and a conductive lower portion formed inside the plurality of holes.
  • the structure of the substrate including the pattern 124 has the advantage that the thickness of the light emitting device can be realized.
  • the conductive upper pattern 120 is formed on the film, and the conductive lower pattern 124 is filled in the plurality of holes, moisture and foreign matters introduced between the lead frame and the insulating substrate of a general light emitting device are included. The defect by penetration can be prevented.
  • the heat generated from the light emitting diode chip 150 is easily discharged through the conductive upper pattern 120 and the conductive lower pattern 124, the heat radiation is excellent.
  • the present invention simplifies the overall configuration of the light emitting device by the structure in which the LED chip 150 is directly mounted on the conductive upper pattern 120 and the lens unit 170 covers the LED chip 150. Therefore, it has the advantage of reducing the manufacturing cost and manufacturing time.
  • FIG. 4 is a plan view showing a light emitting device according to a second embodiment of the present invention
  • Figure 5 is a cross-sectional view showing a light emitting device cut along the line II-II 'of FIG.
  • the light emitting device according to the second exemplary embodiment of the present invention may include the films, the first and second conductive upper patterns 121 and 123, and the protrusions 260. 3 are the same as those of the light emitting device according to the first embodiment of the present invention of FIG.
  • the film includes a plurality of holes such that the first and second conductive upper patterns 121 and 123 are spaced apart from each other.
  • the first and second conductive upper patterns 121 cover the holes.
  • the first and second conductive upper patterns 121 and 123 are spaced apart from each other by a predetermined interval, and are separated from each other between adjacent unit cells. That is, the first conductive upper patterns 121 are connected to each other in a first direction, the second conductive upper patterns 123 are connected to each other in a first direction, and the first and second conductive upper patterns 121, 123 are separated from each other in a first direction.
  • the foot and the diode chip 150 are mounted on the first conductive upper pattern 121. Therefore, the first conductive upper pattern 121 may be designed to be wider than the area of the second conductive upper pattern 123.
  • the protrusion 260 has a function of defining a formation region of the lens unit 170 when the lens unit 170 is formed.
  • the protrusion 260 has a structure surrounding the light emitting diode chip 150 at an outer side of the light emitting diode chip 150.
  • the protrusion 260 may be formed on the reflective layer 160.
  • the protrusion 260 may limit the formation region of the lens unit 170 by surface tension with the light transmitting resin.
  • the light emitting device may be separated into a light emitting device 200 of a unit cell through a unit cell cutting process.
  • the light emitting device includes a film having a plurality of holes, first and second conductive upper patterns 121 and 123 separately separated from each other between unit cells adjacent to the film, and First and second conductive lower patterns 125 and 127 formed on the bottom surfaces of the first and second conductive upper patterns 121 and 123 and the plurality of holes, and mounted on the first conductive upper pattern 121.
  • the structure of the light emitting diode chip 150 has the advantage that the thickness of the light emitting device can be realized.
  • the first and second conductive upper patterns 121 and 123 are formed on the film, and the first and second conductive lower patterns 125 and 127 are filled in the plurality of holes, It is possible to prevent defects due to penetration of moisture, foreign matter, etc. introduced between the lead frame and the insulating substrate.
  • the light emitting device since the first and second conductive upper patterns 121 and 123 are connected by the bridge portion, the light emitting device is connected to the regions of the first and second conductive lower patterns 125 and 127.
  • the cutting area is spaced at regular intervals, and thus the cutting process is easy.
  • the present invention has a structure in which the film surrounds the first and second conductive lower patterns 125 and 127 to the outside of the film, and the first and second conductive lower patterns 125 and 127 are not exposed to the outside of the film. Therefore, it has the advantage of preventing moisture penetration and improving the reliability by preventing deformation by external force.
  • the bridge portion 122 is further formed in the second direction of the first and second conductive upper patterns 121 and 123 to form the first and second conductive lower patterns 125 and 127.
  • the first and second conductive lower patterns 125 and 127 having a uniform thickness as a whole by reducing electrical characteristics such as line resistance.
  • FIG. 6 is a cross-sectional view showing a light emitting device according to a third embodiment of the present invention.
  • the light emitting device according to the third exemplary embodiment of the present invention is the third embodiment of the present invention of FIGS. 4 and 5 except for the protrusion 360, the molding part 390, and the lens part 380. Since it is the same as the structure of the light emitting device which concerns on 2nd embodiment, the same code
  • the light emitting device may be separated into a light emitting device 300 of a unit cell through a unit cell cutting process.
  • the protrusion 360 may be composed of a plurality of layers.
  • the protrusion 360 has an area gradually narrower toward the upper layer.
  • the protrusion 360 has an inner side and an outer side of a stepped structure based on a cross section.
  • the inner side surface of the stepped structure has a function of improving light extraction by refracting light emitted from the LED chip 150 to the outside.
  • the protrusion 360 may be formed on the reflector 160 through a patterning process.
  • the protrusion 360 may include a reflective material or may be a reflective resin.
  • the protrusion 360 has a dam function to limit a region in which the molding part 390 is formed.
  • the molding part 390 may be formed on the LED chip 150.
  • the molding part 390 may be a light transmitting material, for example, silicon.
  • the molding part 390 may be formed inside the protrusion 360.
  • the molding part 390 is limited to a light transmissive material, but is not limited thereto.
  • the molding part 390 may further include a fluorescent material.
  • the lens unit 380 is positioned on the molding unit 390.
  • the lens unit 380 is supported by the molding unit 390 and the protrusion 360.
  • the lens unit 380 may include a fluorescent material or may be a fluorescent resin.
  • the light emitting device includes a film having a plurality of holes, first and second conductive upper patterns 121 and 123 separately separated from each other between unit cells adjacent to the film, and First and second conductive lower patterns 125 and 127 formed on the bottom surfaces of the first and second conductive upper patterns 121 and 123 and the plurality of holes, and mounted on the first conductive upper pattern 121.
  • the structure of the light emitting diode chip 150 has the advantage that the thickness of the light emitting device can be realized.
  • the first and second conductive upper patterns 121 and 123 are formed on the film, and the first and second conductive lower patterns 125 and 127 are filled in the plurality of holes, It is possible to prevent defects due to penetration of moisture, foreign matter, etc. introduced between the lead frame and the insulating substrate.
  • the present invention has the advantage that the light extraction is improved by the protrusion 360 composed of a plurality of layers.
  • FIG. 7 is a plan view showing a light emitting device according to a fourth embodiment of the present invention
  • FIG. 8 is a plan view showing a light emitting device of unit cells separated by a unit cell cutting process.
  • the light emitting device according to the fourth embodiment of the present invention may include the first and second conductive upper patterns 421 and 423, and the first and second conductive lower patterns 425 and 427. ), Except for the bridge portion 422, the same components as those of the light emitting device according to the second embodiment of the present invention of FIGS. 4 to 5 are denoted by the same reference numerals, and detailed description thereof will be omitted.
  • the light emitting device includes a film having a plurality of holes, and the plurality of holes include a pair of holes having different sizes and different shapes for each unit cell.
  • the pair of holes includes a hole having three inner surfaces and a hole having five inner surfaces.
  • the first and second conductive upper patterns 421 and 423 cover the pair of holes. That is, the first conductive upper pattern 421 covers the holes having the five inner surfaces, and the spiral second conductive upper pattern 423 covers the holes having the three inner surfaces.
  • a hole having three inner surfaces and a hole having five inner surfaces is limited and described for each unit cell, but the shape of the hole is not particularly limited, and may be changed.
  • the shapes of the first and second conductive upper patterns 421 and 423 may be changed to correspond to the shapes of the holes.
  • the first and second conductive upper patterns 421 and 423 are spaced apart from each other within a unit cell by a predetermined interval.
  • the light emitting device of the unit cell cut through the cutting process may have first to fourth corners E1 to E4, and a boundary region where the first and second conductive upper patterns 421 and 423 are spaced apart may be formed from the third and It is located parallel to the first diagonal axis connecting the fourth edges E3 and E4. That is, the boundary region where the first and second conductive upper patterns 421 and 423 are spaced apart is positioned in a direction perpendicular to the second diagonal axis connecting the first and second edges E1 and E2.
  • a boundary region in which the first and second conductive upper patterns 421 and 423 are spaced apart from each other is limited to a structure in which the first and second conductive upper patterns 421 and 423 are parallel to the first diagonal axis. 2 may be parallel to the diagonal axis.
  • the bridge portion 422 has a function of connecting the second conductive upper pattern 423 and the first conductive upper patterns 421.
  • First and second conductive upper patterns 421 and 423 in the bridge portion 422 are located in different unit cells. That is, the second conductive upper pattern 423 may be connected to the first conductive upper pattern 421 of adjacent unit cells by the bridge portion 422. In addition, the first conductive upper pattern 421 may be connected to the second conductive upper pattern 423 of adjacent unit cells by the bridge portion 422.
  • the foot and the diode chip 150 are mounted on the first conductive upper pattern 421. Therefore, the first conductive upper pattern 421 may be designed to be larger than the area of the second conductive upper pattern 423.
  • the light emitting device includes a film in which a plurality of holes are formed, first and second conductive upper patterns 421 and 423 separated from each other between unit cells adjacent to the film, and the first and second conductive upper patterns 421 and 423.
  • the lower surface of the first and second conductive upper patterns 421 and 423 and the structure of the first and second conductive lower patterns 425 and 427 formed in the plurality of holes may reduce the thickness of the light emitting device.
  • first and second conductive upper patterns 421 and 423 are formed on the film, and the first and second conductive lower patterns 425 and 427 are filled in a plurality of holes, It is possible to prevent defects due to penetration of moisture, foreign matter, etc. introduced between the lead frame and the insulating substrate.
  • the first and second conductive upper patterns 421 and 423 are connected by the bridge portion 422, the first and second conductive lower patterns 425 and 427 are separated from the cutting area by a predetermined distance. This has the advantage that the cutting process is easy.
  • the present invention improves deterioration of electrical characteristics such as line resistance during the plating process for forming the first and second conductive lower patterns 425 and 427 by the bridge portion 422, thereby providing a first uniform thickness. And the second conductive lower patterns 425 and 427.
  • the present invention has a structure in which the film surrounds the first and second conductive lower patterns 425 and 427 to the outside of the film, and the first and second conductive lower patterns 425 and 427 are not exposed to the outside of the film. Therefore, it has the advantage of preventing moisture penetration and improving the reliability by preventing deformation by external force.
  • the light emitting device has a boundary region where the first and second conductive upper patterns 421 and 423 are spaced apart from each other in the diagonal direction of the unit cell.
  • the maximum mounting margin of 150 may be secured, and the maximum formation margin of holes may be ensured to improve mounting reliability of the light emitting diode chip 150 and maximize heat dissipation effects.
  • FIG. 9 is a plan view illustrating a light emitting device according to a fifth embodiment of the present invention
  • FIG. 10 is a plan view illustrating light emitting devices of unit cells separated by a unit cell cutting process.
  • the light emitting device has the same configuration as the first embodiment of the present invention except for the conductive upper pattern 520 and the conductive lower pattern 524.
  • symbol is written together and detailed description is abbreviate
  • the conductive upper pattern 520 includes a bridge portion 522 to which conductive upper patterns 520 adjacent in a first direction are connected.
  • the conductive upper patterns 520 are spaced apart from the conductive upper patterns 520 adjacent to each other in a second direction and are insulated from each other.
  • the conductive upper pattern 520 is exposed in the region exposed by the reflector, and the Zener diode ZC is mounted in the lens unit 170, and the reflector is formed so as not to overlap with the region in which the Zener diode ZC is formed. Can be.
  • the second protective layer 133 has a structure in which the top and bottom are crushed.
  • the bridge portion 522 connects the conductive upper patterns 520 adjacent to each other in the first direction, and has a function of improving pattern reliability when the conductive upper pattern 520 is formed. That is, the conductive upper pattern 520 may be formed through a plating process, and may be connected to each other in a first direction to improve pattern formation reliability during the manufacturing process.
  • the bridge portion 522 is not particularly limited, but may be smaller than or equal to the width of the conductive upper pattern 520 in the second direction.
  • the bridge portion 522 may be designed to be larger than the radius of the lens portion 170 in the second direction.
  • a reflection part (not shown) is formed on the bridge part 522.
  • the conductive lower pattern 524 has a smaller area than the conductive upper pattern 520.
  • the conductive lower pattern 524 may be divided into first and second regions having different widths in a second direction.
  • an area in which the light emitting diode chip 150 is mounted may be defined as a first area
  • the second area may be defined as an area extending in an edge direction from the first area.
  • the first region has a first width W1 in a first direction
  • the second region has a second width W2 in a first direction.
  • the first width W1 is smaller than the second width W2.
  • the first width W1 may be 80% or more of the second width W2.
  • the first width W1 may be 1.77 mm
  • the second width W2 may be designed to 2.17 mm. According to the present invention, since the first width W1 is designed to be 80% or more of the second width W2, the thickness can be reduced and electrical deterioration can be improved.
  • the light emitting device of the unit cell cut by the unit cell process has a shape in which the conductive upper pattern 520 and the conductive lower pattern 524 correspond to each other, and are exposed to both side surfaces corresponding to the second direction.
  • the bridge part 522 is exposed to the opposite side surfaces corresponding to the first direction.
  • the bridge portion 522 may be connected to the conductive upper pattern 520 along the edge of the light emitting device of the unit cell.
  • the light emitting device has an area where heat can be discharged more than a substrate of a general light emitting device by designing the conductive lower patterns 524 having the first and second widths W1 and W2. This has the advantage of excellent heat dissipation.
  • the first width W1 is designed to be 80% or more of the second width W2, thereby increasing the area of the first region in which the LED chip 150 is mounted. It is possible to improve the reliability of the SMT process.
  • the difference between the first width W1 and the second width W2 is designed to be 20% or less, thereby forming the conductive lower pattern 524 formed by the plating process.
  • the reliability and productivity of the process can be improved.

Abstract

The present invention discloses a light-emitting device which maximizes the optical efficiency and heat-radiation as well as facilitates thin film-type manufacture. The disclosed light-emitting device includes a film including a plurality of holes, upper conductive patterns for covering the plurality of holes, lower conductive patterns extended from the upper conductive pattern so as to be received in the holes, a bridge part for connecting adjacent upper conductive patterns, and a light-emitting diode chip installed in each of the upper conductive patterns, so that the device may be embodied in a thin film-type as well as maximizes the optical efficiency and heat-radiation, providing an advantage of reduced manufacturing time and cost.

Description

발광 디바이스Light emitting device
본 발명은 발광 디바이스에 관한 것으로, 특히 광 효율 및 방열을 극대화함과 동시에 박형 제작이 용이한 발광 디바이스에 관한 것이다.BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a light emitting device, and in particular, to a light emitting device that is easy to manufacture thin and maximize light efficiency and heat dissipation.
발광 다이오드 칩은 순방향 전류에 의해 광을 방출하는 광전변환(electroluminescence) 소자이다. 인듐인(InP), 갈륨비소(GaAs), 갈륨인(GaP) 등의 화합물 반도체가 적색 또는 녹색의 광을 방출하는 발광 다이오드 칩의 재료로 사용되어 왔으며, 질화갈륨(GaN) 계열의 화합물 반도체가 자외선 및 청색의 광을 방출하는 발광 소자의 재료로 개발되어 사용되어 오고 있다.A light emitting diode chip is an electroluminescence device that emits light by a forward current. Compound semiconductors such as indium phosphorus (InP), gallium arsenide (GaAs), and gallium phosphorus (GaP) have been used as materials for light emitting diode chips emitting red or green light, and gallium nitride (GaN) -based compound semiconductors It has been developed and used as a material of a light emitting device that emits ultraviolet light and blue light.
상기 발광 다이오드 칩은 각종 표시장치, 백라이트 광원 등에 널리 사용되고 있으며, 최근, 적, 녹, 청색광을 각각 방출하는 3개의 발광 다이오드 칩들을 이용하거나, 또는 형광체를 사용하여 파장을 변환시킴으로써 백색광을 방출하는 기술이 개발되어 조명장치로도 그 적용 범위를 넓히고 있다.The light emitting diode chip is widely used in various display devices, backlight sources, and the like. In recent years, a light emitting diode chip emits white light by using three light emitting diode chips emitting red, green, and blue light, or by converting a wavelength using a phosphor. It has been developed to expand the scope of application to lighting devices.
일반적인 발광 다이오드 칩은 리드 프레임을 포함하는 기판 상에 격벽에 의해 형성되는 리세스 영역 내에 발광 다이오드 칩이 실장되고, 리세스 영역에 형광물질을 포함하는 봉지부가 충진되어 하나의 발광 패키지를 구성한다.In a typical light emitting diode chip, a light emitting diode chip is mounted in a recess region formed by a partition on a substrate including a lead frame, and an encapsulation portion containing a fluorescent material is filled in the recess region to form one light emitting package.
상기 발광 패키지는 복수개가 회로기판 상에 실장되어 하나의 발광 디바이스로 사용될 수 있다.A plurality of light emitting packages may be mounted on a circuit board and used as one light emitting device.
그러나, 일반적인 발광 디바이스는 이상에서와 같이 격벽 및 리드 프레임을 갖는 기판을 제작하여 발광 다이오드 칩을 실장한 후에 회로기판 상에 발광 패키지를 실장하여 제작되므로 제조가 복잡할 뿐만 아니라 박형화에 한계가 있는 문제가 있었다. 더욱이, 일반적인 발광 디바이스는 금속의 리드 프레임에 몰드 수지를 이용하여 격벽 및 기판을 제작하므로 표면 접착특성 저하에 의한 수분 유입 등으로 불량이 발생되는 구조적인 문제가 있었다.However, a general light emitting device is manufactured by mounting a light emitting package on a circuit board after mounting a light emitting diode chip by manufacturing a substrate having a partition and a lead frame as described above. There was. In addition, the general light emitting device has a structural problem that a failure occurs due to the inflow of moisture due to the surface adhesion characteristics deterioration because the barrier rib and the substrate are manufactured by using a mold resin in a metal lead frame.
본 발명이 해결하고자 하는 과제는, 광 효율 및 방열을 극대화함과 동시에 박형 제작이 용이한 발광 디바이스를 제공하는 것이다.The problem to be solved by the present invention is to provide a light emitting device that can maximize the light efficiency and heat dissipation and at the same time easy to manufacture thin.
또한, 본 발명의 해결하고자 하는 다른 과제는, 제조비용을 줄일 수 있는 발광 디바이스를 제공하는 것이다.In addition, another object of the present invention is to provide a light emitting device that can reduce manufacturing costs.
본 발명의 일 실시예에 따른 발광 디바이스는 다수의 홀을 포함하는 필름; 상기 다수의 홀을 덮는 도전성 상부 패턴; 상기 도전성 상부 패턴으로부터 연장되어 상기 홀에 수용되는 도전성 하부 패턴; 서로 인접한 상기 도전성 상부 패턴 사이를 연결하는 브릿지부; 및 상기 도전성 상부 패턴 각각에 실장된 발광 다이오드 칩을 포함한다.A light emitting device according to an embodiment of the present invention includes a film including a plurality of holes; A conductive upper pattern covering the plurality of holes; A conductive lower pattern extending from the conductive upper pattern and accommodated in the hole; A bridge unit connecting the conductive upper patterns adjacent to each other; And a light emitting diode chip mounted on each of the conductive upper patterns.
상기 다수의 홀은 상기 필름 상에서 매트릭스 형태로 형성된다.The plurality of holes are formed in a matrix form on the film.
상기 브릿지부는 제1 방향으로 인접한 상기 도전성 상부 패턴을 연결하고, 상기 제1 방향과 수직으로 교차되는 제2 방향으로 인접한 상기 도전성 상부패턴은 일정 간격 이격된다.The bridge portion connects the conductive upper patterns adjacent in the first direction, and the conductive upper patterns adjacent in the second direction perpendicular to the first direction are spaced apart from each other by a predetermined interval.
상기 필름은 복수의 단위 셀들로 구성되고, 상기 도전성 상부 패턴은 제1 및 제2 도전성 상부 패턴을 포함하고, 하나의 단위 셀을 기준으로 상기 제1 및 제2 도전성 상부 패턴은 서로 분리되고, 상기 제2 방향으로 인접한 단위 셀들을 기준으로 상기 제1 및 제2 도전성 상부 패턴은 서로 공유한다.The film includes a plurality of unit cells, the conductive upper pattern includes first and second conductive upper patterns, and the first and second conductive upper patterns are separated from each other based on one unit cell. The first and second conductive upper patterns are shared with each other based on adjacent unit cells in a second direction.
서로 분리된 상기 제1 및 제2 도전성 상부 패턴 사이로부터 노출된 상기 필름과, 상기 브릿지부와, 상기 제1 및 제2 도전성 상부 패턴 상부면 일부를 덮는 반사부 및 상기 반사부 상에 위치한 렌즈부를 더 포함한다.The film exposed from between the first and second conductive upper patterns separated from each other, the bridge portion, a reflecting portion covering a portion of the upper surface of the first and second conductive upper pattern, and a lens portion disposed on the reflecting portion. It includes more.
상기 반사부 상에 상기 렌즈부의 형성 영역을 제한하는 돌출부를 더 포함한다.The projection unit further includes a protrusion to limit a region where the lens unit is formed.
상기 돌출부는 복수의 층으로 구성될 수 있고, 상부층으로 갈수록 좁은 면적을 갖고, 내측면이 계단구조를 갖는다.The protrusions may be composed of a plurality of layers, have a narrower area toward the upper layer, and have a stepped structure on the inner side thereof.
상기 돌출부내부에 몰딩부를 더 포함하고, 상기 몰딩부는 형광물질을 더 포함한다.A molding part is further included in the protrusion, and the molding part further includes a fluorescent material.
상기 브릿지부는 제2 방향으로 상기 도전성 상부 패턴의 폭보다 작거나 같고, 상기 렌즈부의 반지름보다 크다.The bridge portion is smaller than or equal to the width of the conductive upper pattern in the second direction and larger than the radius of the lens portion.
상기 도전성 하부 패턴은 제2 방향으로 상이한 폭을 갖는 제1 및 제2 영역을 포함한다.The conductive lower pattern includes first and second regions having different widths in a second direction.
상기 제2 영역의 폭은 상기 제1 영역의 폭보다 크고, 상기 제1 영역의 폭은 상기 제2 영역의 폭의 80% 이상이고, 상기 제1 영역은 상기 발광 다이오드 칩이 실장된 영역이다.The width of the second region is greater than the width of the first region, the width of the first region is 80% or more of the width of the second region, and the first region is a region in which the LED chip is mounted.
상기 도전성 상부 패턴 및 상기 도전성 하부 패턴은 단위 셀 발광 디바이스의 제2 방향과 대응되는 양측면으로 노출된다.The conductive upper pattern and the conductive lower pattern are exposed at both sides corresponding to the second direction of the unit cell light emitting device.
상기 브릿지부는 단위 셀 발광 디바이스의 제1 방향과 대응되는 다른 양측면으로 노출되고, 상기 브릿부와 상기 도전성 상부 패턴은 단위 셀 발광 디바이스의 측면을 따라 서로 연결된다.The bridge portion is exposed to both opposite sides corresponding to the first direction of the unit cell light emitting device, and the brit portion and the conductive upper pattern are connected to each other along the side of the unit cell light emitting device.
상기 필름은 복수의 단위 셀들로 구성되고, 상기 다수의 홀은 하나의 단위 셀마다 제1 및 제2 홀의 한쌍으로 이루어지고, 상기 도전성 상부 패턴은 제1 및 제2 도전성 상부 패턴을 포함하고, 하나의 단위 셀을 기준으로 상기 제1 및 제2 도전성 상부 패턴은 서로 이격된 경계영역을 포함하고, 상기 경계영역은 상기 제1 및 제2 홀 사이에 위치한다.The film is composed of a plurality of unit cells, the plurality of holes is made of a pair of first and second holes per one unit cell, the conductive upper pattern comprises a first and second conductive upper pattern, one The first and second conductive upper patterns may include boundary regions spaced apart from each other, and the boundary regions may be disposed between the first and second holes.
상기 경계영역은 상기 하나의 단위 셀 내에서 대각선 방향과 수평한 방향으로 형성된다.The boundary region is formed in a direction parallel to a diagonal direction in the one unit cell.
상기 제1 홀은 3개의 내측면을 갖고, 상기 제2 홀은 5개의 내측면을 갖는다.The first hole has three inner surfaces, and the second hole has five inner surfaces.
본 발명의 다른 실시예에 따른 발광 디바이스는 제1 방향으로 이격된 제1 도전성 하부패턴 및 제2 도전성 하부 패턴; 상기 제1 도전성 하부 패턴 및 상기 제2 도전성 하부 패턴 상에 각각 위치한 제1 도전성 상부 패턴 및 제2 도전성 상부 패턴; 상기 제1 도전성 하부 패턴 및 상기 제2 도전성 하부 패턴 사이에 위치한 절연부; 상기 제1 방향과 수직한 제2 방향으로 상기 제1 도전성 상부 패턴으로부터 연장된 제1 브릿지부; 상기 제2 방향으로 상기 제2 도전성 상부 패턴으로부터 연장된 제2 브릿지부; 및 상기 제1 도전성 상부 패턴에 실장된 발광 다이오드 칩을 포함한다.In another embodiment, a light emitting device includes: a first conductive lower pattern and a second conductive lower pattern spaced apart in a first direction; A first conductive upper pattern and a second conductive upper pattern respectively positioned on the first conductive lower pattern and the second conductive lower pattern; An insulating part disposed between the first conductive lower pattern and the second conductive lower pattern; A first bridge portion extending from the first conductive upper pattern in a second direction perpendicular to the first direction; A second bridge portion extending from the second conductive upper pattern in the second direction; And a light emitting diode chip mounted on the first conductive upper pattern.
상기 제1 브릿지부, 상기 제2 브릿지부, 상기 제1 도전성 상부 패턴 및 상기 제2 도전성 상부 패턴의 일부를 덮는 반사부; 및 상기 반사부 상에 위치한 렌즈부를 더 포함한다.A reflector covering a portion of the first bridge portion, the second bridge portion, the first conductive upper pattern and the second conductive upper pattern; And a lens unit positioned on the reflecting unit.
상기 제1 브릿지부 및 상기 제2 브릿지부 각각의 폭은 상기 제1 방향으로 상기 제1 도전성 상부 패턴 및 상기 제2 도전성 상부 패턴 각각의 폭보다 작거나 같고, 상기 렌즈부의 반지름보다 크다.The width of each of the first bridge portion and the second bridge portion is less than or equal to the width of each of the first conductive upper pattern and the second conductive upper pattern in the first direction, and larger than the radius of the lens portion.
상기 제2 도전성 하부 패턴은 상기 제1 방향으로 상이한 면적을 갖는 제1 영역 및 제2 영역을 포함하고, 상기 제1 및 제2 영역은 상기 제2 방향으로 서로 상이한 폭을 갖고, 상기 제2 영역의 폭은 상기 제1 영역의 폭보다 크고, 상기 제1 영역의 폭은 상기 제2 영역의 폭의 80% 이상이고, 상기 발광 다이오드 칩은 상기 제1 영역과 중첩된 영역에 실장된다.The second conductive lower pattern includes a first region and a second region having different areas in the first direction, and the first and second regions have different widths in the second direction, and the second region Is greater than the width of the first region, the width of the first region is at least 80% of the width of the second region, and the light emitting diode chip is mounted in a region overlapping the first region.
상기 제1 도전성 상부 패턴, 상기 제2 도전성 상부 패턴, 제1 도전성 하부 패턴 및 상기 제2 도전성 하부 패턴은 상기 제1 방향과 대응되는 양측면으로 노출된 측면을 갖는다.The first conductive upper pattern, the second conductive upper pattern, the first conductive lower pattern, and the second conductive lower pattern have side surfaces exposed to both sides corresponding to the first direction.
상기 제1 브릿지부의 노출된 측면과 상기 제1 도전성 상부 패턴의 노출된 측면은 서로 연결되고, 상기 제2 브릿지부의 노출된 측면과 상기 제1 도전성 상부 패턴의 노출된 측면은 서로 연결된다.The exposed side of the first bridge portion and the exposed side of the first conductive upper pattern are connected to each other, and the exposed side of the second bridge portion and the exposed side of the first conductive upper pattern are connected to each other.
본 발명의 일 실시예들에 따르면, 본 발명은 본 발명의 발광 디바이스는 다수의 홀이 형성된 필름과, 필름 상에 패터닝된 도전성 상부 패턴과, 상기 도전성 상부 패턴의 하부 및 상기 다수의 홀 내부에 형성된 도전성 하부 패턴과, 상기 도전성 상부 패턴 상에 실장된 발광 다이오드 칩의 구조에 의해 발광 디바이스의 박형화를 구현할 수 있는 장점을 갖는다.According to one embodiment of the present invention, the present invention provides a light emitting device comprising a film having a plurality of holes, a conductive upper pattern patterned on the film, and a lower portion of the conductive upper pattern and inside the plurality of holes. The light emitting device can be thinned by the formed conductive lower pattern and the structure of the light emitting diode chip mounted on the conductive upper pattern.
또한, 본 발명은 필름 상에 상기 도전성 상부 패턴이 형성되고, 다수의 홀에 도전성 하부 패턴이 채워지므로 일반적인 발광 디바이스의 리드 프레임과 절연 기판 사이에서 유입되는 수분 및 이물질 등의 침투에 의한 불량을 방지할 수 있다.In addition, since the conductive upper pattern is formed on the film, and the conductive lower pattern is filled in the plurality of holes, the present invention prevents defects due to infiltration of moisture and foreign substances, which are introduced between the lead frame and the insulating substrate of a general light emitting device. can do.
또한, 본 발명은 발광 다이오드 칩으로부터 발생된 열이 상기 도전성 상부 패턴 및 도전성 하부 패턴을 통해서 용이하게 방출되므로 방열이 우수한 장점을 갖는다.In addition, since the heat generated from the light emitting diode chip is easily discharged through the conductive upper pattern and the conductive lower pattern, the heat dissipation is excellent.
또한, 본 발명은 발광 다이오드 칩을 필름의 도전성 상부 패턴 상에 실장한 후, 렌즈부를 덮는 구조로써, 구성이 간소화되므로 제조비용 및 제조시간을 줄일 수 있는 장점을 갖는다.In addition, the present invention has a structure that covers the lens portion after mounting the light emitting diode chip on the conductive upper pattern of the film, the configuration is simplified and has the advantage of reducing the manufacturing cost and manufacturing time.
본 발명의 제2 실시예에 따른 발광 디바이스는 단위 셀 마다 도전성 상부 패턴이 제1 및 제2 도전성 상부 패턴으로 분리되고, 도전성 하부 패턴이 제1 및 제2 도전성 하부 패턴으로 분리되고, 상기 제1 도전성 상부 패턴 상에 실장된 발광 다이오드 칩의 구조에 의해 발광 디바이스의 박형화를 구현할 수 있는 장점을 갖는다.In the light emitting device according to the second exemplary embodiment of the present invention, the conductive upper pattern is separated into the first and second conductive upper patterns, the conductive lower pattern is separated into the first and second conductive lower patterns, and the first cell is formed in each unit cell. The structure of the light emitting diode chip mounted on the conductive upper pattern has an advantage that the thickness of the light emitting device can be realized.
또한, 본 발명의 제2 실시예에 따른 발광 디바이스는 제1 및 제2 도전성 상부 패턴이 브릿지부에 의해 연결되므로 상기 제1 및 제2 도전성 하부 패턴 영역과 절단영역이 일정 간격 이격되어 절단 공정이 용이한 장점을 갖는다.In addition, in the light emitting device according to the second embodiment of the present invention, since the first and second conductive upper patterns are connected by the bridge portion, the first and second conductive lower pattern regions and the cutting regions are spaced at a predetermined interval so that the cutting process is performed. It has an easy advantage.
또한, 본 발명은 필름의 외측으로 제1 및 제2 도전성 하부 패턴을 필름이 감싸는 구조로써, 필름의 외측으로 상기 제1 및 제2 도전성 하부 패턴이 노출되지 않으므로 수분 침투를 방지하고, 외력에 의해 변형을 방지하여 신뢰도를 향상시킬 수 있는 장점을 갖는다.In addition, the present invention is a structure in which the film wraps the first and second conductive lower pattern to the outside of the film, the first and second conductive lower pattern is not exposed to the outside of the film to prevent moisture intrusion, It has the advantage of improving the reliability by preventing deformation.
또한, 본 발명은 제1 및 제2 도전성 상부 패턴의 제2 방향으로 브릿지부가 더 형성되어 제1 및 제2 도전성 하부 패턴 형성을 위한 도금 공정 시에 라인 저항등의 전기적 특성 저하를 개선하여 전체적으로 균일한 두께의 제1 및 제2 도전성 하부 패턴을 형성할 수 있는 장점을 갖는다.In addition, in the present invention, the bridge portion is further formed in the second direction of the first and second conductive upper patterns to improve the electrical characteristics such as line resistance during the plating process for forming the first and second conductive lower patterns, thereby improving overall uniformity. It has the advantage of being able to form first and second conductive lower patterns of one thickness.
또한, 본 발명은 복수의 층으로 구성되는 상기 돌출부에 의해 광 추출이 향상되는 장점을 갖는다.In addition, the present invention has the advantage that the light extraction is improved by the protrusion consisting of a plurality of layers.
도 1은 본 발명의 제1 실시예에 따른 발광 디바이스를 도시한 평면도이다.1 is a plan view showing a light emitting device according to a first embodiment of the present invention.
도 2는 단위 셀 절단공정에 의해 분리된 단위 셀의 발광 디바이스를 도시한 평면도이다.2 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
도 3은 도 1의 Ⅰ-Ⅰ'라인을 따라 절단한 발광 디바이스를 도시한 단면도이다.3 is a cross-sectional view illustrating a light emitting device cut along the line II ′ of FIG. 1.
도 4는 본 발명의 제2 실시예에 따른 발광 디바이스를 도시한 평면도이다.4 is a plan view showing a light emitting device according to a second embodiment of the present invention.
도 5는 도 4의 Ⅱ-Ⅱ'라인을 따라 절단한 발광 디바이스를 도시한 단면도이다.FIG. 5 is a cross-sectional view illustrating a light emitting device cut along the line II-II ′ of FIG. 4.
도 6은 본 발명의 제3 실시예에 따른 발광 디바이스를 도시한 단면도이다.6 is a cross-sectional view showing a light emitting device according to a third embodiment of the present invention.
도 7은 본 발명의 제4 실시예에 따른 발광 디바이스를 도시한 평면도이다.7 is a plan view showing a light emitting device according to a fourth embodiment of the present invention.
도 8은 단위 셀 절단 공정에 의해 분리된 단위 셀의 발광 디바이스를 도시한 평면도이다.8 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
도 9는 본 발명의 제5 실시예에 따른 발광 디바이스를 도시한 평면도이다.9 is a plan view showing a light emitting device according to a fifth embodiment of the present invention.
도 10은 단위 셀 절단공정에 의해 분리된 단위 셀의 발광 디바이스를 도시한 평면도이다.10 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
이하, 첨부한 도면들을 참조하여 본 발명의 실시예들을 상세히 설명한다. 다음에 소개되는 실시예들은 당업자에게 본 발명의 사상이 충분히 전달될 수 있도록 하기 위해 예로서 제공되는 것이다. 따라서, 본 발명은 이하 설명되는 실시예들에 한정되지 않고 다른 형태로 구체화될 수도 있다. 그리고, 도면들에 있어서, 구성요소의 폭, 길이, 두께 등은 편의를 위하여 과장되어 표현될 수도 있다. 명세서 전체에 걸쳐서 동일한 참조번호들은 동일한 구성요소들을 나타낸다.Hereinafter, with reference to the accompanying drawings will be described embodiments of the present invention; The following embodiments are provided as examples to ensure that the spirit of the present invention can be fully conveyed to those skilled in the art. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, widths, lengths, thicknesses, and the like of components may be exaggerated for convenience. Like numbers refer to like elements throughout.
도 1은 본 발명의 제1 실시예에 따른 발광 디바이스를 도시한 평면도이고, 도 2는 단위 셀 절단공정에 의해 분리된 단위 셀의 발광 디바이스를 도시한 평면도이다.1 is a plan view showing a light emitting device according to a first embodiment of the present invention, Figure 2 is a plan view showing a light emitting device of a unit cell separated by a unit cell cutting process.
도 3은 도 1의 Ⅰ-Ⅰ'라인을 따라 절단한 발광 디바이스를 도시한 단면도이다.3 is a cross-sectional view illustrating a light emitting device cut along the line II ′ of FIG. 1.
도 1 내지 도 3에 도시된 바와 같이, 본 발명의 제1 실시예에 따른 발광 디바이스는 다수의 셀들이 연결된 구조를 갖는다.1 to 3, the light emitting device according to the first embodiment of the present invention has a structure in which a plurality of cells are connected.
상기 발광 디바이스는 다수의 홀을 갖는 필름과, 다수의 도전성 상부 패턴(120), 다수의 도전성 하부 패턴(124), 다수의 발광 다이오드 칩(150), 반사부(160) 및 다수의 렌즈부(170)를 포함한다.The light emitting device includes a film having a plurality of holes, a plurality of conductive upper patterns 120, a plurality of conductive lower patterns 124, a plurality of light emitting diode chips 150, a reflecting unit 160, and a plurality of lens units ( 170).
상기 필름은 절연층(110) 및 제1 접착층(111)을 포함한다. 상기 필름은 다수의 홀을 감싸는 매트릭스 구조를 갖는다. 상기 필름은 기계적인 펀칭(Punching) 공정을 통해 형성될 수 있다.The film includes an insulating layer 110 and a first adhesive layer 111. The film has a matrix structure surrounding a plurality of holes. The film may be formed through a mechanical punching process.
상기 도전성 상부 패턴(120)은 상기 홀을 덮고, 상기 필름의 상부면 상으로 연장되고, 제1 방향으로 인접한 도전성 상부 패턴(120)들이 연결되는 브릿지부(122)를 포함한다. 상기 도전성 상부 패턴(120)들은 상기 제1 방향을 기준으로 수직하게 교차되는 제2 방향으로 일정 간격 이격되고, 상기 제2 방향으로 인접한 상기 도전성 상부 패턴(120)들은 상기 필름에 의해서 서로 절연될 수 있다.The conductive upper pattern 120 includes a bridge portion 122 covering the hole, extending over the upper surface of the film, and connecting the conductive upper patterns 120 adjacent in the first direction. The conductive upper patterns 120 may be spaced apart at a predetermined interval in a second direction vertically intersecting with respect to the first direction, and the conductive upper patterns 120 adjacent to the second direction may be insulated from each other by the film. have.
여기서, 본 발명의 제1 실시예에서는 상기 제1 방향으로 인접한 도전성 상부 패턴(120)들을 연결시키는 브릿지부(122)를 한정하여 설명하고 있지만, 이에 한정하지 않고, 검사공정 등에서 검사 신호를 전체 발광 다이오드 칩(150)으로 안정적으로 공급하기 위해 상기 제2 방향으로 인접한 도전성 상부 패턴(120)들을 연결시키는 브릿지부가 더 형성될 수도 있다.Here, in the first exemplary embodiment of the present invention, the bridge portion 122 connecting the conductive upper patterns 120 adjacent to each other in the first direction is limited. However, the present invention is not limited thereto. In order to stably supply the diode chip 150, a bridge part connecting the adjacent conductive upper patterns 120 in the second direction may be further formed.
상기 도전성 상부 패턴(120)은 인접한 단위 셀들 간에 제1 및 제2 도전성 상부 패턴(121, 123)이 서로 공유하고, 절단공정을 통해서 인접한 단위 셀들 간에 공유하는 상기 제1 및 제2 도전성 상부 패턴(121, 123)이 분리될 수 있다.In the conductive upper pattern 120, the first and second conductive upper patterns 121 and 123 are shared between adjacent unit cells, and the first and second conductive upper patterns shared by adjacent unit cells through a cutting process. 121, 123 may be separated.
상기 도전성 하부 패턴(124)은 상기 다수의 홀 내부에 형성될 수 있다. 상기 도전성 하부 패턴(124)은 상기 도전성 상부 패턴(120)의 하부면으로부터 도금공정을 통해서 형성될 수 있다. 상기 도전성 하부 패턴(124)의 면적은 상기 도전성 상부 패턴(120)의 면적보다 좁다.The conductive lower pattern 124 may be formed in the plurality of holes. The conductive lower pattern 124 may be formed through a plating process from a lower surface of the conductive upper pattern 120. An area of the conductive lower pattern 124 is smaller than an area of the conductive upper pattern 120.
상기 반사부(160)는 상기 필름 및 상기 도전성 상부 패턴(120)의 일부를 덮는다. 구체적으로 상기 반사부(160)는 상기 도전성 상부 패턴(120)으로부터 노출된 상기 필름 상에 형성된다. 또한, 상기 반사부(160)는 상기 도전성 상부 패턴(120)의 발광 다이오드 칩(150)이 실장되는 영역 및 상기 발광 다이오드 칩(150)의 전극과 전기적으로 연결되는 영역을 제외한 상기 도전성 상부 패턴(120) 상에 형성될 수 있다.The reflector 160 covers a portion of the film and the conductive upper pattern 120. Specifically, the reflector 160 is formed on the film exposed from the conductive upper pattern 120. In addition, the reflector 160 may include the conductive upper pattern except for a region in which the LED chip 150 of the conductive upper pattern 120 is mounted and a region electrically connected to the electrodes of the LED chip 150 ( 120).
상기 반사부(160)는 반사율이 높은 반사물질을 포함하는 수지일 수 있다.The reflector 160 may be a resin including a reflective material having a high reflectance.
상기 반사부(160)의 형성 방법은 특별히 한정되지 않으나, 예컨대 인쇄 공정을 통해 형성될 수 있다. 따라서, 상기 반사부(160)는 상기 필름 및 도전성 상부 패턴(120)의 표면으로부터 일정한 두께를 갖는다.The reflection method 160 is not particularly limited, but may be formed by, for example, a printing process. Therefore, the reflector 160 has a predetermined thickness from the surface of the film and the conductive upper pattern 120.
상기 발광 다이오드 칩(150)은 상기 도전성 상부 패턴(120) 상에 위치하되 상기 도전성 상부 패턴(120)의 일측 가장자리에 실장된다. 상기 발광 다이오드 칩(150)은 전극들을 포함하고, 상기 전극들은 각각 제1` 및 제2 와이어(151, 152)를 통해서 상기 도전성 상부 패턴(120)과 전기적으로 연결된다. 여기서, 본 발명의 발광 다이오드 칩(150)은 전극들이 제1` 및 제2 와이어(151, 152)에 의해 상기 도전성 상부 패턴(120)과 전기적으로 연결되는 구조만을 한정하여 설명하고 있지만, 특별히 한정하지 않고, 하나의 와이어를 이용하는 수직타입 등 다양한 타입의 발광 다이오드 칩이 적용될 수 있다.The light emitting diode chip 150 is disposed on the conductive upper pattern 120 but is mounted on one side edge of the conductive upper pattern 120. The LED chip 150 includes electrodes, and the electrodes are electrically connected to the conductive upper pattern 120 through first and second wires 151 and 152, respectively. Here, the light emitting diode chip 150 of the present invention is limited to a structure in which electrodes are electrically connected to the conductive upper pattern 120 by the first and second wires 151 and 152, but are specifically limited. Instead, various types of light emitting diode chips, such as a vertical type using one wire, can be applied.
상기 발광 디바이스는 절단 공정을 통해 단위 셀의 발광 디바이스로 분리하기 위해 매트릭스 형태의 스크라이빙 영역(SR)을 갖는다.The light emitting device has a scribing region SR in the form of a matrix for separating into light emitting devices of a unit cell through a cutting process.
상기 발광 디바이스는 도 2 및 3을 참조하면, 절단 공정을 통해 단위 셀의 발광 디바이스(100)로 분리될 수 있다.2 and 3, the light emitting device may be separated into the light emitting device 100 of a unit cell through a cutting process.
상기 단위 셀의 발광 디바이스(100)는 필름, 발광 다이오드 칩(150)과, 제1 및 제2 도전성 상부 패턴(121, 123), 제1 및 제2 도전성 하부 패턴(125, 127), 반사부(160) 및 렌즈부(170)를 포함한다.The light emitting device 100 of the unit cell includes a film, a light emitting diode chip 150, first and second conductive upper patterns 121 and 123, first and second conductive lower patterns 125 and 127, and a reflector. 160 and the lens unit 170.
상기 필름은 절연층(110) 및 제1 접착층(111)을 포함한다. 상기 제1 접착층(111)은 상기 절연층(110) 상에 위치한다.The film includes an insulating layer 110 and a first adhesive layer 111. The first adhesive layer 111 is located on the insulating layer 110.
상기 제1 및 제2 도전성 상부 패턴(121, 123)은 상기 제1 접착층(111) 상에 위치한다. 상기 제1 및 제2 도전성 상부 패턴(121, 123)은 특별히 한정되지 않지만, 예컨대 구리 패턴일 수 있다.The first and second conductive upper patterns 121 and 123 are disposed on the first adhesive layer 111. The first and second conductive upper patterns 121 and 123 are not particularly limited, but may be, for example, copper patterns.
상기 제1 및 제2 도전성 상부 패턴(121, 123) 상에는 제1 및 제2 보호층(131, 133)이 형성될 수 있다. 상기 제1 및 제2 보호층(131, 133)은 공기와의 접촉 등에 의한 상기 제1 및 제2 도전성 상부 패턴(121, 123)의 특성 변형, 예컨대 부식으로부터 보호하는 기능을 갖는다. 상기 제1 및 제2 보호층(131, 133)은 광을 반사시킬 수 있는 물질로 이루어진다. 상기 제1 및 제2 보호층(131, 133)은 광을 반사시키는 부가 기능을 갖으며, 특별히 한정되지 않지만, 예컨대 Ag/Ni일 수 있다.First and second protective layers 131 and 133 may be formed on the first and second conductive upper patterns 121 and 123. The first and second protective layers 131 and 133 have a function of protecting the first and second conductive upper patterns 121 and 123 from deformation, for example, corrosion, by contact with air. The first and second protective layers 131 and 133 are made of a material capable of reflecting light. The first and second protective layers 131 and 133 have an additional function of reflecting light and are not particularly limited, but may be Ag / Ni, for example.
상기 제1 도전성 하부 패턴(125)은 상기 제1 도전성 상부 패턴(121)의 하부에 형성된다. 상기 제1 도전성 하부 패턴(125)은 도금 공정을 통해서 형성될 수 있다. 즉, 상기 제1 도전성 하부 패턴(125)은 상기 제1 도전성 상부 패턴(121)의 하부면 상에 형성될 수 있다. 또한, 상기 제1 도전성 하부 패턴(125)은 상기 필름의 하부면과 대응되는 영역까지 연장될 수 있다.The first conductive lower pattern 125 is formed under the first conductive upper pattern 121. The first conductive lower pattern 125 may be formed through a plating process. That is, the first conductive lower pattern 125 may be formed on the bottom surface of the first conductive upper pattern 121. In addition, the first conductive lower pattern 125 may extend to an area corresponding to the lower surface of the film.
상기 제2 도전성 하부 패턴(127)은 상기 제2 도전성 상부 패턴(123)의 하부에 형성된다. 상기 제2 도전성 하부 패턴(127)은 도금 공정을 통해서 형성될 수 있다. 즉, 상기 제2 도전성 하부 패턴(127)은 상기 제2 도전성 상부 패턴(123)의 하부면 상에 형성될 수 있다. 또한, 상기 제2 도전성 하부 패턴(127)은 상기 필름의 하부면과 대응되는 영역까지 연장될 수 있다.The second conductive lower pattern 127 is formed under the second conductive upper pattern 123. The second conductive lower pattern 127 may be formed through a plating process. That is, the second conductive lower pattern 127 may be formed on the bottom surface of the second conductive upper pattern 123. In addition, the second conductive lower pattern 127 may extend to an area corresponding to the lower surface of the film.
상기 발광 다이오드 칩(150)은 상기 제1 도전성 상부 패턴(121) 상에 위치한다. 상기 발광 다이오드 칩(150)은 제2 접착층(140)에 의해 상기 제1 도전성 상부 패턴(121) 상에 실장될 수 있다.The light emitting diode chip 150 is disposed on the first conductive upper pattern 121. The light emitting diode chip 150 may be mounted on the first conductive upper pattern 121 by the second adhesive layer 140.
상기 발광 다이오드 칩(150)은 전극들(미도시)을 포함한다. 상기 전극들 중 하나는 제1 와이어(151)에 의해 상기 제1 도전성 상부 패턴(121)과 전기적으로 연결되고, 상기 전극들 중 다른 하나는 제2 와이어(152)에 의해 상기 제2 도전성 상부 패턴(123)과 전기적으로 연결된다.The LED chip 150 includes electrodes (not shown). One of the electrodes is electrically connected to the first conductive upper pattern 121 by a first wire 151, and the other of the electrodes is connected to the second conductive upper pattern by a second wire 152. Is electrically connected to 123.
상기 발광 다이오드 칩(150) 상에는 형광물질(180)이 도포된다. 상기 형광물질(180)은 스프레이(spray) 공정을 통해서 상기 발광 다이오드 칩(150) 상에 형성될 수 있다.The fluorescent material 180 is coated on the light emitting diode chip 150. The fluorescent material 180 may be formed on the light emitting diode chip 150 through a spray process.
본 발명의 제1 실시예에서는 상기 형광물질(180)을 스프레이 공정으로 형성되는 방법을 한정하여 설명하고 있지만, 이에 한정하지 않고, 스핀 코팅, 정전기 증착 및 전기영동 증착 등이 사용될 수 있다.In the first embodiment of the present invention, a method of forming the fluorescent material 180 by the spray process is described. However, the present invention is not limited thereto, and spin coating, electrostatic deposition, and electrophoretic deposition may be used.
상기 제2 접착층(140) 및 상기 제1 도전성 상부 패턴(121) 사이에는 상기 제1 보호층(131)이 위치한다. 즉, 상기 제2 접착층(140)은 상기 발광 다이오드 칩(150)과 상기 제1 도전성 상부 패턴(121) 상에 위치한 제1 보호층(W1) 사이에 위치할 수 있다.The first passivation layer 131 is positioned between the second adhesive layer 140 and the first conductive upper pattern 121. That is, the second adhesive layer 140 may be located between the light emitting diode chip 150 and the first passivation layer W1 disposed on the first conductive upper pattern 121.
상기 반사부(160)는 상기 제1 및 제2 도전성 상부 패턴(121, 123)으로부터 노출된 필름의 제1 접착층(111) 상에 형성되고, 상기 제1 및 제2 도전성 상부 패턴(121, 123)의 상부면 일부에 형성된다. 여기서, 상기 반사부(160)는 반사율이 높은 반사물질을 포함하거나 반사율이 높은 수지일 수 있다.The reflector 160 is formed on the first adhesive layer 111 of the film exposed from the first and second conductive upper patterns 121 and 123, and the first and second conductive upper patterns 121 and 123. It is formed in a part of the upper surface of the). The reflector 160 may include a reflective material having a high reflectance or a resin having a high reflectance.
상기 렌즈부(170)는 상기 발광 다이오드 칩(150)을 덮고, 상기 반사부(160) 상에 위치한다. 상기 렌즈부(170)는 투광성 물질로 이루어지며, 가장자리를 따라 상기 반사부(160)를 덮는 연장부(171)를 더 포함할 수 있다. 여기서, 상기 연장부(171)는 투광성 물질, 예컨대 실리콘일 수 있다.The lens unit 170 covers the light emitting diode chip 150 and is positioned on the reflecting unit 160. The lens unit 170 may be made of a light-transmissive material, and may further include an extension part 171 covering the reflective part 160 along an edge thereof. The extension part 171 may be a light transmitting material, for example, silicon.
도 1 내지 도 3을 참조하여 상기 발광 디바이스의 제조 방법을 설명하면, 제1 단계는 절연층(110) 상에 제1 접착층(111)을 도포하고, 펀칭 공정으로 다수의 홀이 형성된다.Referring to FIGS. 1 to 3, a method of manufacturing the light emitting device is described. In the first step, the first adhesive layer 111 is coated on the insulating layer 110, and a plurality of holes are formed by a punching process.
제2 단계는 상기 다수의 홀을 덮는 금속층을 형성하고, 상기 금속층의 하부에 도금 공정으로 제1 및 제2 도전성 하부 패턴(125, 127)이 형성된다.In the second step, a metal layer covering the plurality of holes is formed, and first and second conductive lower patterns 125 and 127 are formed under the metal layer by a plating process.
제3 단계는 상기 금속층의 패터닝 공정을 통해서 상기 제1 접착층(111)의 일부를 노출시키는 제1 및 제2 도전성 상부 패턴(121, 123)을 형성한다. 여기서, 노출된 상기 제1 접착층(111)은 상기 제1 및 제2 도전성 상부 패턴(121, 123)의 경계를 정의한다.In the third step, the first and second conductive upper patterns 121 and 123 exposing a part of the first adhesive layer 111 are formed through a patterning process of the metal layer. Here, the exposed first adhesive layer 111 defines a boundary between the first and second conductive upper patterns 121 and 123.
제4 단계는 반사율이 높은 반사물질을 포함하는 수지를 상기 제1 및 제2 도전성 상부 패턴(121, 123) 및 노출된 상기 제1 접착층(111) 상에 형성하고, 패터닝 공정으로 반사부(160)가 형성된다.In the fourth step, a resin including a reflective material having a high reflectance is formed on the first and second conductive upper patterns 121 and 123 and the exposed first adhesive layer 111, and the reflector 160 is formed by a patterning process. ) Is formed.
제5 단계는 상기 반사부(160)로부터 노출된 제1 및 제2 도전성 상부 패턴(121, 123) 상에 제1 및 제2 보호층(131, 133)을 형성한다.In the fifth step, first and second protective layers 131 and 133 are formed on the first and second conductive upper patterns 121 and 123 exposed from the reflector 160.
제6 단계는 제2 접착층(140)을 이용하여 발광 다이오드 칩(150)을 상기 제1 도전성 상부 패턴(121) 상에 실장하고, 제1 및 제2 와이어(151, 152)를 이용하여 상기 발광 다이오드 칩(150)과 상기 제1 및 제2 도전성 상부 패턴(121, 123)을 전기적으로 연결한다.In the sixth step, the LED chip 150 is mounted on the first conductive upper pattern 121 using the second adhesive layer 140, and the light emission is performed using the first and second wires 151 and 152. The diode chip 150 is electrically connected to the first and second conductive upper patterns 121 and 123.
제7 단계는 상기 발광 다이오드 칩(150) 상에 스프레이 공정을 이용하여 상기 발광 다이오드 칩(150) 상에 형광물질(180)을 형성한다.In a seventh step, the fluorescent material 180 is formed on the light emitting diode chip 150 using a spray process on the light emitting diode chip 150.
여기서, 상기 형광물질(180)은 마스크(미도시)를 이용하여 발광 다이오드 칩(150)의 주변에 한정적으로 형성될 수도 있다. 상기 형광물질(180)은 전체적으로 균일한 두께를 갖는다.Here, the fluorescent material 180 may be limitedly formed around the light emitting diode chip 150 using a mask (not shown). The fluorescent material 180 has a uniform thickness as a whole.
제8 단계는 상기 발광 다이오드 칩(150)을 덮는 렌즈부(170)를 형상한다.In an eighth step, the lens unit 170 covering the LED chip 150 is formed.
본 발명의 제1 실시예에서는 상기 형광물질(180)이 발광 다이오드 칩(150) 상에 직접 형성되는 구조만을 한정하여 설명하고 있지만, 이에 한정하지 않고, 렌즈부(170) 내부에 혼합되거나, 상기 렌즈부(170) 표면에 형성될 수도 있다. 여기서, 상기 렌즈부(170) 내부 또는 표면에 형성되는 형광물질은 전체적으로 균일한 두께를 갖는다.In the first embodiment of the present invention, only the structure in which the fluorescent material 180 is directly formed on the light emitting diode chip 150 is described. However, the present invention is not limited thereto and may be mixed inside the lens unit 170, or It may be formed on the surface of the lens unit 170. Here, the fluorescent material formed inside or on the surface of the lens unit 170 has a uniform thickness as a whole.
이상에서와 같이 본 발명의 발광 디바이스는 다수의 홀이 형성된 필름과, 필름 상에 패터닝된 도전성 상부 패턴(120)과, 상기 도전성 상부 패턴(120)의 하부 및 상기 다수의 홀 내부에 형성된 도전성 하부 패턴(124)을 포함하는 기판의 구조에 의해 발광 디바이스의 박형화를 구현할 수 있는 장점을 갖는다.As described above, the light emitting device of the present invention includes a film having a plurality of holes, a conductive upper pattern 120 patterned on the film, a lower portion of the conductive upper pattern 120, and a conductive lower portion formed inside the plurality of holes. The structure of the substrate including the pattern 124 has the advantage that the thickness of the light emitting device can be realized.
또한, 본 발명은 필름 상에 상기 도전성 상부 패턴(120)이 형성되고, 다수의 홀에 도전성 하부 패턴(124)이 채워지므로 일반적인 발광 디바이스의 리드 프레임과 절연 기판 사이에서 유입되는 수분 및 이물질 등의 침투에 의한 불량을 방지할 수 있다.In addition, in the present invention, since the conductive upper pattern 120 is formed on the film, and the conductive lower pattern 124 is filled in the plurality of holes, moisture and foreign matters introduced between the lead frame and the insulating substrate of a general light emitting device are included. The defect by penetration can be prevented.
또한, 본 발명은 발광 다이오드 칩(150)으로부터 발생된 열이 상기 도전성 상부 패턴(120) 및 도전성 하부 패턴(124)을 통해서 용이하게 방출되므로 방열이 우수한 장점을 갖는다.In addition, since the heat generated from the light emitting diode chip 150 is easily discharged through the conductive upper pattern 120 and the conductive lower pattern 124, the heat radiation is excellent.
또한, 본 발명은 도전성 상부 패턴(120) 상에 상기 발광 다이오드 칩(150)이 직접 실장되고, 상기 발광 다이오드 칩(150)을 렌즈부(170)가 덮는 구조에 의해 발광 디바이스의 전체 구성이 간소화되므로 제조비용 및 제조시간을 줄일 수 있는 장점을 갖는다.In addition, the present invention simplifies the overall configuration of the light emitting device by the structure in which the LED chip 150 is directly mounted on the conductive upper pattern 120 and the lens unit 170 covers the LED chip 150. Therefore, it has the advantage of reducing the manufacturing cost and manufacturing time.
도 4는 본 발명의 제2 실시예에 따른 발광 디바이스를 도시한 평면도이고, 도 5는 도 4의 Ⅱ-Ⅱ'라인을 따라 절단한 발광 디바이스를 도시한 단면도이다.4 is a plan view showing a light emitting device according to a second embodiment of the present invention, Figure 5 is a cross-sectional view showing a light emitting device cut along the line II-II 'of FIG.
도 4 및 도 5에 도시된 바와 같이, 본 발명의 제2 실시예에 따른 발광 디바이스는 필름, 제1 및 제2 도전성 상부 패턴(121, 123), 돌출부(260)를 제외하고, 도 1 내지 도 3의 본 발명의 제1 실시예에 따른 발광 디바이스의 구성들과 동일하므로 동일한 부호를 병기하고, 상세한 설명은 생략한다.As shown in FIGS. 4 and 5, the light emitting device according to the second exemplary embodiment of the present invention may include the films, the first and second conductive upper patterns 121 and 123, and the protrusions 260. 3 are the same as those of the light emitting device according to the first embodiment of the present invention of FIG.
상기 필름은 상기 제1 및 제2 도전성 상부 패턴(121, 123)이 서로 이격되게 다수의 홀을 포함한다. 상기 제1 및 제2 도전성 상부 패턴(121)은 상기 다수의 홀을 덮는다.The film includes a plurality of holes such that the first and second conductive upper patterns 121 and 123 are spaced apart from each other. The first and second conductive upper patterns 121 cover the holes.
상기 제1 및 제2 도전성 상부 패턴(121, 123)은 서로 일정 간격 이격되며, 인접한 단위 셀들 사이에서 서로 분리된다. 즉, 상기 제1 도전성 상부 패턴(121)들은 제1 방향으로 서로 연결되고, 상기 제2 도전성 상부 패턴(123)들은 제1 방향으로 서로 연결되고, 상기 제1 및 제2 도전성 상부 패턴(121, 123)은 제1 방향으로 서로 분리된다.The first and second conductive upper patterns 121 and 123 are spaced apart from each other by a predetermined interval, and are separated from each other between adjacent unit cells. That is, the first conductive upper patterns 121 are connected to each other in a first direction, the second conductive upper patterns 123 are connected to each other in a first direction, and the first and second conductive upper patterns 121, 123 are separated from each other in a first direction.
상기 제1 도전성 상부 패턴(121) 상에는 발과 다이오드 칩(150)이 실장된다. 따라서, 상기 제1 도전성 상부 패턴(121)은 상기 제2 도전성 상부 패턴(123)의 면적보다 넓게 설계될 수 있다.The foot and the diode chip 150 are mounted on the first conductive upper pattern 121. Therefore, the first conductive upper pattern 121 may be designed to be wider than the area of the second conductive upper pattern 123.
상기 돌출부(260)는 렌즈부(170) 형성시에 렌즈부(170)의 형성 영역을 한정하는 기능을 갖는다. 상기 돌출부(260)는 상기 발광 다이오드 칩(150)의 외각으로 상기 발광 다이오드 칩(150)을 감싸는 구조를 갖는다. 상기 돌출부(260)는 반사층(160) 상에 형성될 수 있다. 상기 돌출부(260)는 투광성 수지와의 표면 장력에 의해 렌즈부(170)의 형성 영역을 제한할 수 있다.The protrusion 260 has a function of defining a formation region of the lens unit 170 when the lens unit 170 is formed. The protrusion 260 has a structure surrounding the light emitting diode chip 150 at an outer side of the light emitting diode chip 150. The protrusion 260 may be formed on the reflective layer 160. The protrusion 260 may limit the formation region of the lens unit 170 by surface tension with the light transmitting resin.
상기 발광 디바이스는 단위 셀 절단공정을 통해 단위 셀의 발광 디바이스(200)로 분리될 수 있다.The light emitting device may be separated into a light emitting device 200 of a unit cell through a unit cell cutting process.
본 발명의 제2 실시예에 따른 발광 디바이스는 다수의 홀이 형성된 필름과, 필름 상에 인접한 단위 셀 사이에서 서로 개별적으로 분리된 제1 및 제2 도전성 상부 패턴(121, 123)과, 상기 제1 및 제2 도전성 상부 패턴(121, 123)의 하부면 및 상기 다수의 홀 내부에 형성된 제1 및 제2 도전성 하부 패턴(125, 127)과, 상기 제1 도전성 상부 패턴(121) 상에 실장된 발광 다이오드 칩(150)의 구조에 의해 발광 디바이스의 박형화를 구현할 수 있는 장점을 갖는다.The light emitting device according to the second embodiment of the present invention includes a film having a plurality of holes, first and second conductive upper patterns 121 and 123 separately separated from each other between unit cells adjacent to the film, and First and second conductive lower patterns 125 and 127 formed on the bottom surfaces of the first and second conductive upper patterns 121 and 123 and the plurality of holes, and mounted on the first conductive upper pattern 121. The structure of the light emitting diode chip 150 has the advantage that the thickness of the light emitting device can be realized.
또한, 본 발명은 필름 상에 상기 제1 및 제2 도전성 상부 패턴(121, 123)이 형성되고, 다수의 홀에 제1 및 제2 도전성 하부 패턴(125, 127)이 채워지므로 일반적인 발광 디바이스의 리드 프레임과 절연 기판 사이에서 유입되는 수분 및 이물질 등의 침투에 의한 불량을 방지할 수 있다.In addition, in the present invention, since the first and second conductive upper patterns 121 and 123 are formed on the film, and the first and second conductive lower patterns 125 and 127 are filled in the plurality of holes, It is possible to prevent defects due to penetration of moisture, foreign matter, etc. introduced between the lead frame and the insulating substrate.
또한, 본 발명은 발광 다이오드 칩(150)으로부터 발생된 열이 상기 제1 및 제2 도전성 상부 패턴(121, 123) 및 제1 및 제2 도전성 하부 패턴(125, 127)을 통해서 용이하게 방출되므로 방열이 우수한 장점을 갖는다.In addition, since the heat generated from the light emitting diode chip 150 is easily discharged through the first and second conductive upper patterns 121 and 123 and the first and second conductive lower patterns 125 and 127. Heat dissipation has an excellent advantage.
또한, 본 발명의 제2 실시예에 따른 발광 디바이스는 제1 및 제2 도전성 상부 패턴(121, 123)이 브릿지부에 의해 연결되므로 상기 제1 및 제2 도전성 하부 패턴(125, 127) 영역과 절단영역이 일정 간격 이격되어 절단 공정이 용이한 장점을 갖는다.In the light emitting device according to the second embodiment of the present invention, since the first and second conductive upper patterns 121 and 123 are connected by the bridge portion, the light emitting device is connected to the regions of the first and second conductive lower patterns 125 and 127. The cutting area is spaced at regular intervals, and thus the cutting process is easy.
또한, 본 발명은 필름의 외측으로 제1 및 제2 도전성 하부 패턴(125, 127)을 필름이 감싸는 구조로써, 필름의 외측으로 상기 제1 및 제2 도전성 하부 패턴(125, 127)이 노출되지 않으므로 수분 침투를 방지하고, 외력에 의해 변형을 방지하여 신뢰도를 향상시킬 수 있는 장점을 갖는다.In addition, the present invention has a structure in which the film surrounds the first and second conductive lower patterns 125 and 127 to the outside of the film, and the first and second conductive lower patterns 125 and 127 are not exposed to the outside of the film. Therefore, it has the advantage of preventing moisture penetration and improving the reliability by preventing deformation by external force.
또한, 본 발명은 제1 및 제2 도전성 상부 패턴(121, 123)의 제2 방향으로 브릿지부(122)가 더 형성되어 제1 및 제2 도전성 하부 패턴(125, 127) 형성을 위한 도금 공정 시에 라인 저항등의 전기적 특성 저하를 개선하여 전체적으로 균일한 두께의 제1 및 제2 도전성 하부 패턴(125, 127)을 형성할 수 있는 장점을 갖는다.In addition, in the present invention, the bridge portion 122 is further formed in the second direction of the first and second conductive upper patterns 121 and 123 to form the first and second conductive lower patterns 125 and 127. In this case, it is possible to form the first and second conductive lower patterns 125 and 127 having a uniform thickness as a whole by reducing electrical characteristics such as line resistance.
도 6은 본 발명의 제3 실시예에 따른 발광 디바이스를 도시한 단면도이다.6 is a cross-sectional view showing a light emitting device according to a third embodiment of the present invention.
도 6에 도시된 바와 같이, 본 발명의 제3 실시예에 따른 발광 디바이스는 돌출부(360), 몰딩부(390) 및 렌즈부(380)를 제외하고, 도 4 및 도 5의 본 발명의 제2 실시예에 따른 발광 디바이스의 구성들과 동일하므로 동일한 부호를 병기하고, 상세한 설명은 생략한다.As shown in FIG. 6, the light emitting device according to the third exemplary embodiment of the present invention is the third embodiment of the present invention of FIGS. 4 and 5 except for the protrusion 360, the molding part 390, and the lens part 380. Since it is the same as the structure of the light emitting device which concerns on 2nd embodiment, the same code | symbol is written together and detailed description is abbreviate | omitted.
상기 발광 디바이스는 단위 셀 절단공정을 통해 단위 셀의 발광 디바이스(300)로 분리될 수 있다.The light emitting device may be separated into a light emitting device 300 of a unit cell through a unit cell cutting process.
상기 돌출부(360)는 복수의 층으로 구성될 수 있다. 상기 돌출부(360)는 상부 층으로 갈수록 점차 좁은 면적은 갖는다. 상기 돌출부(360)는 단면을 기준으로 계단구조의 내측면 및 외측면을 갖는다. 상기 계단구조의 내측면은 발광 다이오드 칩(150)으로부터 발광된 광을 외부로 굴절시켜 광 추출을 향상시키는 기능을 갖는다. 상기 돌출부(360)는 패터닝 공정을 통해서 반사부(160) 상에 형성될 수 있다. 상기 돌출부(360)는 반사물질을 포함하거나, 반사 수지일 수 있다.The protrusion 360 may be composed of a plurality of layers. The protrusion 360 has an area gradually narrower toward the upper layer. The protrusion 360 has an inner side and an outer side of a stepped structure based on a cross section. The inner side surface of the stepped structure has a function of improving light extraction by refracting light emitted from the LED chip 150 to the outside. The protrusion 360 may be formed on the reflector 160 through a patterning process. The protrusion 360 may include a reflective material or may be a reflective resin.
상기 돌출부(360)는 상기 몰딩부(390)의 형성 영역을 제한하는 댐 기능을 갖는다.The protrusion 360 has a dam function to limit a region in which the molding part 390 is formed.
상기 몰딩부(390)는 상기 발광 다이오드 칩(150) 상에 형성될 수 있다. 상기 몰딩부(390)는 투광성 물질, 예컨대 실리콘일 수 있다. 상기 몰딩부(390)는 상기 돌출부(360)의 내측에 형성될 수 있다.The molding part 390 may be formed on the LED chip 150. The molding part 390 may be a light transmitting material, for example, silicon. The molding part 390 may be formed inside the protrusion 360.
본 발명의 제3 실시예에서는 상기 몰딩부(390)가 투광성 물질으로 한정하고 있지만, 이에 한정하지 않고, 상기 몰딩부(390)는 형광물질을 더 포함할 수 있다.In the third embodiment of the present invention, the molding part 390 is limited to a light transmissive material, but is not limited thereto. The molding part 390 may further include a fluorescent material.
상기 렌즈부(380)는 상기 몰딩부(390) 상에 위치한다. 상기 렌즈부(380)는 상기 몰딩부(390) 및 돌출부(360)에 의해 지지된다. 상기 렌즈부(380)는 형광물질을 포함하거나, 형광수지일 수 있다.The lens unit 380 is positioned on the molding unit 390. The lens unit 380 is supported by the molding unit 390 and the protrusion 360. The lens unit 380 may include a fluorescent material or may be a fluorescent resin.
본 발명의 제3 실시예에 따른 발광 디바이스는 다수의 홀이 형성된 필름과, 필름 상에 인접한 단위 셀 사이에서 서로 개별적으로 분리된 제1 및 제2 도전성 상부 패턴(121, 123)과, 상기 제1 및 제2 도전성 상부 패턴(121, 123)의 하부면 및 상기 다수의 홀 내부에 형성된 제1 및 제2 도전성 하부 패턴(125, 127)과, 상기 제1 도전성 상부 패턴(121) 상에 실장된 발광 다이오드 칩(150)의 구조에 의해 발광 디바이스의 박형화를 구현할 수 있는 장점을 갖는다.The light emitting device according to the third embodiment of the present invention includes a film having a plurality of holes, first and second conductive upper patterns 121 and 123 separately separated from each other between unit cells adjacent to the film, and First and second conductive lower patterns 125 and 127 formed on the bottom surfaces of the first and second conductive upper patterns 121 and 123 and the plurality of holes, and mounted on the first conductive upper pattern 121. The structure of the light emitting diode chip 150 has the advantage that the thickness of the light emitting device can be realized.
또한, 본 발명은 필름 상에 상기 제1 및 제2 도전성 상부 패턴(121, 123)이 형성되고, 다수의 홀에 제1 및 제2 도전성 하부 패턴(125, 127)이 채워지므로 일반적인 발광 디바이스의 리드 프레임과 절연 기판 사이에서 유입되는 수분 및 이물질 등의 침투에 의한 불량을 방지할 수 있다.In addition, in the present invention, since the first and second conductive upper patterns 121 and 123 are formed on the film, and the first and second conductive lower patterns 125 and 127 are filled in the plurality of holes, It is possible to prevent defects due to penetration of moisture, foreign matter, etc. introduced between the lead frame and the insulating substrate.
또한, 본 발명은 발광 다이오드 칩(150)으로부터 발생된 열이 상기 제1 및 제2 도전성 상부 패턴(121, 123) 및 제1 및 제2 도전성 하부 패턴(125, 127)을 통해서 용이하게 방출되므로 방열이 우수한 장점을 갖는다.In addition, since the heat generated from the light emitting diode chip 150 is easily discharged through the first and second conductive upper patterns 121 and 123 and the first and second conductive lower patterns 125 and 127. Heat dissipation has an excellent advantage.
또한, 본 발명은 복수의 층으로 구성되는 상기 돌출부(360)에 의해 광 추출이 향상되는 장점을 갖는다.In addition, the present invention has the advantage that the light extraction is improved by the protrusion 360 composed of a plurality of layers.
도 7은 본 발명의 제4 실시예에 따른 발광 디바이스를 도시한 평면도이고, 도 8은 단위 셀 절단 공정에 의해 분리된 단위 셀의 발광 디바이스를 도시한 평면도이다.FIG. 7 is a plan view showing a light emitting device according to a fourth embodiment of the present invention, and FIG. 8 is a plan view showing a light emitting device of unit cells separated by a unit cell cutting process.
도 7 및 도 8에 도시된 바와 같이, 본 발명의 제4 실시예에 따른 발광 디바이스는 제1 및 제2 도전성 상부 패턴(421, 423), 제1 및 제2 도전형 하부 패턴(425, 427), 브릿지부(422)를 제외하고, 도 4 내지 도 5의 본 발명의 제2 실시예에 따른 발광 디바이스의 구성들과 동일하므로 동일한 부호를 병기하고, 상세한 설명은 생략한다.As shown in FIGS. 7 and 8, the light emitting device according to the fourth embodiment of the present invention may include the first and second conductive upper patterns 421 and 423, and the first and second conductive lower patterns 425 and 427. ), Except for the bridge portion 422, the same components as those of the light emitting device according to the second embodiment of the present invention of FIGS. 4 to 5 are denoted by the same reference numerals, and detailed description thereof will be omitted.
본 발명의 제4 실시예에 따른 발광 디바이스는 다수의 홀을 갖는 필름을 포함하고, 상기 다수의 홀은 단위 셀마다 상이한 크기와 상이한 형상을 갖는 한쌍의 홀들을 포함한다.The light emitting device according to the fourth embodiment of the present invention includes a film having a plurality of holes, and the plurality of holes include a pair of holes having different sizes and different shapes for each unit cell.
상기 한쌍의 홀들은 3개의 내측면을 갖는 홀 및 5개의 내측면을 갖는 홀을 포함한다.The pair of holes includes a hole having three inner surfaces and a hole having five inner surfaces.
상기 제1 및 제2 도전성 상부 패턴(421, 423)은 상기 한쌍의 홀을 덮는다. 즉, 상기 제1 도전성 상부 패턴(421)은 상기 5개의 내측면을 갖는 홀을 덮고, 사익 제2 도전성 상부 패턴(423)은 3개의 내측면을 갖는 홀을 덮는다. 여기서, 본 발명의 제4 실시예에서는 단위 셀마다 3개의 내측면을 갖는 홀 및 5개의 내측면을 갖는 홀을 한정하여 설명하고 있지만, 홀의 형상은 특별히 한정하지 않고, 얼마든지 변경될 수 있다. 또한, 상기 제1 및 제2 도전성 상부 패턴(421, 423)의 형상은 상기 홀의 형상에 대응되도록 변경될 수 있다.The first and second conductive upper patterns 421 and 423 cover the pair of holes. That is, the first conductive upper pattern 421 covers the holes having the five inner surfaces, and the spiral second conductive upper pattern 423 covers the holes having the three inner surfaces. Here, in the fourth embodiment of the present invention, a hole having three inner surfaces and a hole having five inner surfaces is limited and described for each unit cell, but the shape of the hole is not particularly limited, and may be changed. In addition, the shapes of the first and second conductive upper patterns 421 and 423 may be changed to correspond to the shapes of the holes.
상기 제1 및 제2 도전성 상부 패턴(421, 423)은 단위 셀 내에서 서로 일정 간격 이격된다. 절단 공정을 통해 절단된 단위 셀의 발광 디바이스는 제1 내지 제4 모서리(E1 내지 E4)를 갖고, 상기 제1 및 제2 도전성 상부 패턴(421, 423)이 이격된 경계영역은 상기 제3 및 제4 모서리(E3 및 E4)를 잇는 제1 대각선 축과 평행하게 위치한다. 즉, 상기 제1 및 제2 도전성 상부 패턴(421, 423)이 이격된 경계영역은 상기 제1 및 제2 모서리(E1 및 E2)를 잇는 제2 대각선 축과 수직한 방향에 위치한다. 본 발명의 제4 실시예에서는 상기 제1 및 제2 도전성 상부 패턴(421, 423)이 이격된 경계영역이 상기 제1 대각선 축과 평행하게 위치한 구조를 한정하고 있지만, 이에 한정하지 않고, 상기 제2 대각선 축과 평행하게 위치할 수도 있다.The first and second conductive upper patterns 421 and 423 are spaced apart from each other within a unit cell by a predetermined interval. The light emitting device of the unit cell cut through the cutting process may have first to fourth corners E1 to E4, and a boundary region where the first and second conductive upper patterns 421 and 423 are spaced apart may be formed from the third and It is located parallel to the first diagonal axis connecting the fourth edges E3 and E4. That is, the boundary region where the first and second conductive upper patterns 421 and 423 are spaced apart is positioned in a direction perpendicular to the second diagonal axis connecting the first and second edges E1 and E2. In the fourth exemplary embodiment of the present invention, a boundary region in which the first and second conductive upper patterns 421 and 423 are spaced apart from each other is limited to a structure in which the first and second conductive upper patterns 421 and 423 are parallel to the first diagonal axis. 2 may be parallel to the diagonal axis.
상기 브릿지부(422)는 제2 도전성 상부 패턴(423)과 제1 도전성 상부 패턴들(421)을 연결하는 기능을 갖는다. 상기 브릿지부(422)에 제1 및 제2 도전성 상부 패턴들(421, 423)은 서로 상이한 단위 셀에 위치한다. 즉, 상기 제2 도전성 상부 패턴(423)은 상기 브릿지부(422)에 의해 인접한 단위 셀들의 제1 도전성 상부 패턴(421)과 연결될 수 있다. 또한, 상기 제1 도전성 상부 패턴(421)은 상기 브릿지부(422)에 의해 인접한 단위 셀들의 제2 도전성 상부 패턴(423)과 연결될 수 있다.The bridge portion 422 has a function of connecting the second conductive upper pattern 423 and the first conductive upper patterns 421. First and second conductive upper patterns 421 and 423 in the bridge portion 422 are located in different unit cells. That is, the second conductive upper pattern 423 may be connected to the first conductive upper pattern 421 of adjacent unit cells by the bridge portion 422. In addition, the first conductive upper pattern 421 may be connected to the second conductive upper pattern 423 of adjacent unit cells by the bridge portion 422.
상기 제1 도전성 상부 패턴(421) 상에는 발과 다이오드 칩(150)이 실장된다. 따라서, 상기 제1 도전성 상부 패턴(421)은 상기 제2 도전성 상부 패턴(423)의 면적보다 넓게 설계될 수 있다.The foot and the diode chip 150 are mounted on the first conductive upper pattern 421. Therefore, the first conductive upper pattern 421 may be designed to be larger than the area of the second conductive upper pattern 423.
본 발명의 제4 실시예에 따른 발광 디바이스는 다수의 홀이 형성된 필름과, 필름 상에 인접한 단위 셀 사이에서 서로 개별적으로 분리된 제1 및 제2 도전성 상부 패턴(421, 423)과, 상기 제1 및 제2 도전성 상부 패턴(421, 423)의 하부면 및 상기 다수의 홀 내부에 형성된 제1 및 제2 도전성 하부 패턴(425, 427)의 구조에 의해 발광 디바이스의 박형화를 구현할 수 있는 장점을 갖는다.The light emitting device according to the fourth embodiment of the present invention includes a film in which a plurality of holes are formed, first and second conductive upper patterns 421 and 423 separated from each other between unit cells adjacent to the film, and the first and second conductive upper patterns 421 and 423. The lower surface of the first and second conductive upper patterns 421 and 423 and the structure of the first and second conductive lower patterns 425 and 427 formed in the plurality of holes may reduce the thickness of the light emitting device. Have
또한, 본 발명은 필름 상에 상기 제1 및 제2 도전성 상부 패턴(421, 423)이 형성되고, 다수의 홀에 제1 및 제2 도전성 하부 패턴(425, 427)이 채워지므로 일반적인 발광 디바이스의 리드 프레임과 절연 기판 사이에서 유입되는 수분 및 이물질 등의 침투에 의한 불량을 방지할 수 있다.In addition, in the present invention, since the first and second conductive upper patterns 421 and 423 are formed on the film, and the first and second conductive lower patterns 425 and 427 are filled in a plurality of holes, It is possible to prevent defects due to penetration of moisture, foreign matter, etc. introduced between the lead frame and the insulating substrate.
또한, 본 발명은 발광 다이오드 칩(150)으로부터 발생된 열이 상기 제1 및 제2 도전성 상부 패턴(421, 423) 및 제1 및 제2 도전성 하부 패턴(425, 427)을 통해서 용이하게 방출되므로 방열이 우수한 장점을 갖는다.In addition, since the heat generated from the light emitting diode chip 150 is easily discharged through the first and second conductive upper patterns 421 and 423 and the first and second conductive lower patterns 425 and 427. Heat dissipation has an excellent advantage.
또한, 본 발명은 제1 및 제2 도전성 상부 패턴(421, 423)이 브릿지부(422)에 의해 연결되므로 상기 제1 및 제2 도전성 하부 패턴(425, 427) 영역과 절단영역이 일정 간격 이격되어 절단 공정이 용이한 장점을 갖는다.In addition, according to the present invention, since the first and second conductive upper patterns 421 and 423 are connected by the bridge portion 422, the first and second conductive lower patterns 425 and 427 are separated from the cutting area by a predetermined distance. This has the advantage that the cutting process is easy.
또한, 본 발명은 상기 브릿지부(422)에 의해 제1 및 제2 도전성 하부 패턴(425, 427) 형성을 위한 도금 공정 시에 라인 저항등의 전기적 특성 저하를 개선하여 전체적으로 균일한 두께의 제1 및 제2 도전성 하부 패턴(425, 427)을 형성할 수 있는 장점을 갖는다.In addition, the present invention improves deterioration of electrical characteristics such as line resistance during the plating process for forming the first and second conductive lower patterns 425 and 427 by the bridge portion 422, thereby providing a first uniform thickness. And the second conductive lower patterns 425 and 427.
또한, 본 발명은 필름의 외측으로 제1 및 제2 도전성 하부 패턴(425, 427)을 필름이 감싸는 구조로써, 필름의 외측으로 상기 제1 및 제2 도전성 하부 패턴(425, 427)이 노출되지 않으므로 수분 침투를 방지하고, 외력에 의해 변형을 방지하여 신뢰도를 향상시킬 수 있는 장점을 갖는다.In addition, the present invention has a structure in which the film surrounds the first and second conductive lower patterns 425 and 427 to the outside of the film, and the first and second conductive lower patterns 425 and 427 are not exposed to the outside of the film. Therefore, it has the advantage of preventing moisture penetration and improving the reliability by preventing deformation by external force.
또한, 본 발명의 제4 실시예에 따른 발광 디바이스는 단위 셀마다 상기 제1 및 제2 도전성 상부 패턴(421, 423)이 서로 이격된 경계영역이 단위 셀의 대각선 방향으로 형성되어 발광 다이오드 칩(150)의 실장 마진을 최대로 확보할 수 있고, 홀의 형성 마진을 최대로 확보함으로써, 발광 다이오드 칩(150)의 실장 신뢰도를 향상시키고, 방열 효과를 극대화할 수 있는 장점을 갖는다.In addition, the light emitting device according to the fourth exemplary embodiment of the present invention has a boundary region where the first and second conductive upper patterns 421 and 423 are spaced apart from each other in the diagonal direction of the unit cell. The maximum mounting margin of 150 may be secured, and the maximum formation margin of holes may be ensured to improve mounting reliability of the light emitting diode chip 150 and maximize heat dissipation effects.
도 9는 본 발명의 제5 실시예에 따른 발광 디바이스를 도시한 평면도이고, 도 10은 단위 셀 절단공정에 의해 분리된 단위 셀의 발광 디바이스를 도시한 평면도이다.9 is a plan view illustrating a light emitting device according to a fifth embodiment of the present invention, and FIG. 10 is a plan view illustrating light emitting devices of unit cells separated by a unit cell cutting process.
도 9 및 도 10에 도시된 바와 같이, 본 발명의 제5 실시예에 따른 발광 디바이스는 도전성 상부 패턴(520) 및 도전성 하부 패턴(524)을 제외한 구성은 본 발명의 제1 실시예와 동일하므로 동일한 부호를 병기하고 상세한 설명은 생략하기로 한다.9 and 10, the light emitting device according to the fifth embodiment of the present invention has the same configuration as the first embodiment of the present invention except for the conductive upper pattern 520 and the conductive lower pattern 524. The same code | symbol is written together and detailed description is abbreviate | omitted.
상기 도전성 상부 패턴(520)은 제1 방향으로 인접한 도전성 상부 패턴(520)이 연결되는 브릿지부(522)를 포함한다. 상기 도전성 상부 패턴(520)은 제2 방향으로 인접한 도전성 상부 패턴(520)과 일정 간격 이격되어 서로 절연된다.The conductive upper pattern 520 includes a bridge portion 522 to which conductive upper patterns 520 adjacent in a first direction are connected. The conductive upper patterns 520 are spaced apart from the conductive upper patterns 520 adjacent to each other in a second direction and are insulated from each other.
상기 도전성 상부 패턴(520)은 반사부에 의해 노출된 영역에 있어서, 제너 다이오드(ZC)는 렌즈부(170) 안에 실장되고, 상기 반사부는 상기 제너 다이오드(ZC)기 형성된 영역과 중첩되지 않게 형성될 수 있다. 도면을 참조하면, 상기 제2 보호층(133)은 상하가 찌그러진 구조를 갖는다.The conductive upper pattern 520 is exposed in the region exposed by the reflector, and the Zener diode ZC is mounted in the lens unit 170, and the reflector is formed so as not to overlap with the region in which the Zener diode ZC is formed. Can be. Referring to the drawings, the second protective layer 133 has a structure in which the top and bottom are crushed.
상기 브릿지부(522)는 제1 방향으로 인접한 상기 도전성 상부 패턴(520)들을 서로 연결하며, 상기 도전성 상부 패턴(520)의 형성 시에 패턴 신뢰도를 향상시키기 위한 기능을 갖는다. 즉, 상기 도전성 상부 패턴(520)은 도금 공정을 통해서 형성될 수 있고, 제1 방향으로 서로 연결되어 제조공정 시에 패턴 형성 신뢰도를 향상시킬 수 있다. 상기 브릿지부(522)는 특별히 한정되지 않지만, 제2 방향으로 상기 도전성 상부 패턴(520)의 폭 보다 작거나 같을 수 있다. 상기 브릿지부(522)는 제2 방향으로 렌즈부(170)의 반지름보다 크게 설계될 수 있다. 상기 브릿지부(522) 상에는 반사부(미도시)가 형성된다.The bridge portion 522 connects the conductive upper patterns 520 adjacent to each other in the first direction, and has a function of improving pattern reliability when the conductive upper pattern 520 is formed. That is, the conductive upper pattern 520 may be formed through a plating process, and may be connected to each other in a first direction to improve pattern formation reliability during the manufacturing process. The bridge portion 522 is not particularly limited, but may be smaller than or equal to the width of the conductive upper pattern 520 in the second direction. The bridge portion 522 may be designed to be larger than the radius of the lens portion 170 in the second direction. A reflection part (not shown) is formed on the bridge part 522.
상기 도전성 하부 패턴(524)은 상기 도전성 상부 패턴(520)보다 작은 면적을 가진다. 상기 도전성 하부 패턴(524)은 제2 방향으로 상이한 폭을 갖는 제1 및 제2 영역으로 구분될 수 있다. 여기서, 발광 다이오드 칩(150)이 실장되는 영역을 제1 영역으로 정의할 수 있고, 상기 제2 영역은 상기 제1 영역으로부터 가장자리 방향으로 연장된 영역으로 정의할 수 있다. 상기 제1 영역은 제1 방향으로 제1 폭(W1)을 갖고, 상기 제2 영역은 제1 방향으로 제2 폭(W2)을 갖는다. 상기 제1 폭(W1)은 상기 제2 폭(W2)보다 작다. 구체적으로 상기 제1 폭(W1)은 상기 제2 폭(W2)의 80% 이상일 수 있다. 예컨대 상기 제1 폭(W1)은 1.77㎜일 수 있고, 제2 폭(W2)은 2.17㎜로 설계될 수 있다. 본 발명은 제1 폭(W1)이 상기 제2 폭(W2)의 80% 이상으로 설계됨으로써, 박형화를 구현함과 동시에 전기적 특성 저하를 개선할 수 있다.The conductive lower pattern 524 has a smaller area than the conductive upper pattern 520. The conductive lower pattern 524 may be divided into first and second regions having different widths in a second direction. Here, an area in which the light emitting diode chip 150 is mounted may be defined as a first area, and the second area may be defined as an area extending in an edge direction from the first area. The first region has a first width W1 in a first direction, and the second region has a second width W2 in a first direction. The first width W1 is smaller than the second width W2. In detail, the first width W1 may be 80% or more of the second width W2. For example, the first width W1 may be 1.77 mm, and the second width W2 may be designed to 2.17 mm. According to the present invention, since the first width W1 is designed to be 80% or more of the second width W2, the thickness can be reduced and electrical deterioration can be improved.
단위 셀 공정으로 절단된 단위 셀의 발광 디바이스는 상기 도전성 상부 패턴(520) 및 도전성 하부 패턴(524)이 서로 대응되는 형상을 갖고, 제2 방향과 대응되는 양측면으로 노출된다.The light emitting device of the unit cell cut by the unit cell process has a shape in which the conductive upper pattern 520 and the conductive lower pattern 524 correspond to each other, and are exposed to both side surfaces corresponding to the second direction.
상기 단위 셀의 발광 디바이스는 제1 방향과 대응되는 다른 양측면으로 상기 브릿지부(522)가 노출된다. 여기서, 상기 브릿지부(522)는 상기 단위 셀의 발광 디바이스의 모서리를 따라 상기 도전성 상부 패턴(520)과 서로 연결될 수 있다.In the light emitting device of the unit cell, the bridge part 522 is exposed to the opposite side surfaces corresponding to the first direction. Here, the bridge portion 522 may be connected to the conductive upper pattern 520 along the edge of the light emitting device of the unit cell.
본 발명의 제5 실시예에 따른 발광 디바이스는 제1 및 제2 폭(W1,W2)의 상기 도전성 하부 패턴(524)의 설계에 의해 일반적인 발광 디바이스의 기판보다 열이 배출될 수 있는 면적이 증가하여 방열이 우수한 장점을 갖는다.The light emitting device according to the fifth embodiment of the present invention has an area where heat can be discharged more than a substrate of a general light emitting device by designing the conductive lower patterns 524 having the first and second widths W1 and W2. This has the advantage of excellent heat dissipation.
또한, 본 발명의 제5 실시예에 따른 발광 디바이스는 제1 폭(W1)이 제2 폭(W2)의 80%이상으로 설계되어 발광 다이오드 칩(150)이 실장되는 제1 영역의 면적을 넓혀 SMT 공정의 신뢰도를 향상시킬 수 있다.In addition, in the light emitting device according to the fifth embodiment of the present invention, the first width W1 is designed to be 80% or more of the second width W2, thereby increasing the area of the first region in which the LED chip 150 is mounted. It is possible to improve the reliability of the SMT process.
또한, 본 발명의 제5 실시예에 따른 발광 디바이스는 제1 폭(W1)과 제2 폭(W2)의 차이가 20%이하로 설계됨으로써, 도금 공정으로 형성되는 도전성 하부 패턴(524)의 형성 공정의 신뢰도 및 생산성이 향상될 수 있다.Further, in the light emitting device according to the fifth embodiment of the present invention, the difference between the first width W1 and the second width W2 is designed to be 20% or less, thereby forming the conductive lower pattern 524 formed by the plating process. The reliability and productivity of the process can be improved.

Claims (22)

  1. 다수의 홀을 포함하는 필름;A film comprising a plurality of holes;
    상기 다수의 홀을 덮는 도전성 상부 패턴;A conductive upper pattern covering the plurality of holes;
    상기 도전성 상부 패턴으로부터 연장되어 상기 홀에 수용되는 도전성 하부 패턴;A conductive lower pattern extending from the conductive upper pattern and accommodated in the hole;
    서로 인접한 상기 도전성 상부 패턴 사이를 연결하는 브릿지부; 및A bridge unit connecting the conductive upper patterns adjacent to each other; And
    상기 도전성 상부 패턴 각각에 실장된 발광 다이오드 칩을 포함하는 발광 디바이스.And a light emitting diode chip mounted on each of the conductive upper patterns.
  2. 청구항 1에 있어서,The method according to claim 1,
    상기 다수의 홀은 상기 필름 상에서 매트릭스 형태로 형성된 발광 디바이스.Wherein the plurality of holes are formed in a matrix form on the film.
  3. 청구항 1에 있어서,The method according to claim 1,
    상기 브릿지부는 제1 방향으로 인접한 상기 도전성 상부 패턴을 연결하고, 상기 제1 방향과 수직으로 교차되는 제2 방향으로 인접한 상기 도전성 상부패턴은 일정 간격 이격된 발광 디바이스.The bridge portion connects the conductive upper pattern adjacent in the first direction, and the conductive upper pattern adjacent in the second direction perpendicular to the first direction is spaced apart at regular intervals.
  4. 청구항 1에 있어서,The method according to claim 1,
    상기 필름은 복수의 단위 셀들로 구성되고, 상기 도전성 상부 패턴은 제1 및 제2 도전성 상부 패턴을 포함하고, 하나의 단위 셀을 기준으로 상기 제1 및 제2 도전성 상부 패턴은 서로 분리되고, 상기 제2 방향으로 인접한 단위 셀들을 기준으로 상기 제1 및 제2 도전성 상부 패턴은 서로 공유하는 발광 디바이스.The film includes a plurality of unit cells, the conductive upper pattern includes first and second conductive upper patterns, and the first and second conductive upper patterns are separated from each other based on one unit cell. The light emitting device of claim 1, wherein the first and second conductive upper patterns are shared with each other based on adjacent unit cells in a second direction.
  5. 청구항 4에 있어서,The method according to claim 4,
    서로 분리된 상기 제1 및 제2 도전성 상부 패턴 사이로부터 노출된 상기 필름과, 상기 브릿지부와, 상기 제1 및 제2 도전성 상부 패턴 상부면 일부를 덮는 반사부 및 상기 반사부 상에 위치한 렌즈부를 더 포함하는 발광 디바이스.The film exposed from between the first and second conductive upper patterns separated from each other, the bridge portion, a reflecting portion covering a portion of the upper surface of the first and second conductive upper pattern, and a lens portion disposed on the reflecting portion. A light emitting device further comprising.
  6. 청구항 5에 있어서,The method according to claim 5,
    상기 반사부 상에 상기 렌즈부의 형성 영역을 제한하는 돌출부를 더 포함하는 발광 디바이스.And a projection that restricts a formation region of the lens portion on the reflecting portion.
  7. 청구항 5에 있어서,The method according to claim 5,
    상기 돌출부는 복수의 층으로 구성될 수 있고, 상부층으로 갈수록 좁은 면적을 갖고, 내측면이 계단구조를 갖는 발광 디바이스.The projection may be composed of a plurality of layers, the light emitting device having a narrow area toward the upper layer, the inner surface has a step structure.
  8. 청구항 5에 있어서,The method according to claim 5,
    상기 돌출부내부에 몰딩부를 더 포함하고, 상기 몰딩부는 형광물질을 더 포함하는 발광 디바이스.And a molding part inside the protrusion, the molding part further comprising a fluorescent material.
  9. 청구항 5에 있어서,The method according to claim 5,
    상기 브릿지부는 제2 방향으로 상기 도전성 상부 패턴의 폭보다 작거나 같고, 상기 렌즈부의 반지름보다 큰 발광 디바이스.And the bridge portion less than or equal to the width of the conductive upper pattern in a second direction and larger than the radius of the lens portion.
  10. 청구항 1에 있어서,The method according to claim 1,
    상기 도전성 하부 패턴은 제2 방향으로 상이한 폭을 갖는 제1 및 제2 영역을 포함하는 발광 디바이스.And the conductive lower pattern includes first and second regions having different widths in a second direction.
  11. 청구항 10에 있어서,The method according to claim 10,
    상기 제2 영역의 폭은 상기 제1 영역의 폭보다 크고, 상기 제1 영역의 폭은 상기 제2 영역의 폭의 80% 이상이고, 상기 제1 영역은 상기 발광 다이오드 칩이 실장된 영역인 발광 디바이스.The width of the second region is greater than the width of the first region, the width of the first region is 80% or more of the width of the second region, and the first region is a light emitting region in which the LED chip is mounted device.
  12. 청구항 1에 있어서,The method according to claim 1,
    상기 도전성 상부 패턴 및 상기 도전성 하부 패턴은 단위 셀 발광 디바이스의 제2 방향과 대응되는 양측면으로 노출된 발광 디바이스.The conductive upper pattern and the conductive lower pattern are exposed to both sides corresponding to the second direction of the unit cell light emitting device.
  13. 청구항 1에 있어서,The method according to claim 1,
    상기 브릿지부는 단위 셀 발광 디바이스의 제1 방향과 대응되는 다른 양측면으로 노출되고, 상기 브릿지부와 상기 도전성 상부 패턴은 단위 셀 발광 디바이스의 측면을 따라 서로 연결되는 발광 디바이스.And the bridge portion is exposed to both opposite sides corresponding to the first direction of the unit cell light emitting device, and the bridge portion and the conductive upper pattern are connected to each other along the side of the unit cell light emitting device.
  14. 청구항 1에 있어서,The method according to claim 1,
    상기 필름은 복수의 단위 셀들로 구성되고, 상기 다수의 홀은 하나의 단위 셀마다 제1 및 제2 홀의 한쌍으로 이루어지고, 상기 도전성 상부 패턴은 제1 및 제2 도전성 상부 패턴을 포함하고, 하나의 단위 셀을 기준으로 상기 제1 및 제2 도전성 상부 패턴은 서로 이격된 경계영역을 포함하고, 상기 경계영역은 상기 제1 및 제2 홀 사이에 위치하는 발광 디바이스.The film is composed of a plurality of unit cells, the plurality of holes is made of a pair of first and second holes per one unit cell, the conductive upper pattern comprises a first and second conductive upper pattern, one The light emitting device of claim 1, wherein the first and second conductive upper patterns include boundary regions spaced apart from each other, and the boundary regions are positioned between the first and second holes.
  15. 청구항 14에 있어서,The method according to claim 14,
    상기 경계영역은 상기 하나의 단위 셀 내에서 대각선 방향과 수평한 방향으로 형성된 발광 디바이스.And the boundary area is formed in a direction parallel to a diagonal direction in the one unit cell.
  16. 청구항 14에 있어서,The method according to claim 14,
    상기 제1 홀은 3개의 내측면을 갖고, 상기 제2 홀은 5개의 내측면을 갖는 발광 디바이스.Wherein the first hole has three inner surfaces and the second hole has five inner surfaces.
  17. 제1 방향으로 이격된 제1 도전성 하부패턴 및 제2 도전성 하부 패턴;A first conductive lower pattern and a second conductive lower pattern spaced in the first direction;
    상기 제1 도전성 하부 패턴 및 상기 제2 도전성 하부 패턴 상에 각각 위치한 제1 도전성 상부 패턴 및 제2 도전성 상부 패턴;A first conductive upper pattern and a second conductive upper pattern respectively positioned on the first conductive lower pattern and the second conductive lower pattern;
    상기 제1 도전성 하부 패턴 및 상기 제2 도전성 하부 패턴 사이에 위치한 절연부;An insulating part disposed between the first conductive lower pattern and the second conductive lower pattern;
    상기 제1 방향과 수직한 제2 방향으로 상기 제1 도전성 상부 패턴으로부터 연장된 제1 브릿지부;A first bridge portion extending from the first conductive upper pattern in a second direction perpendicular to the first direction;
    상기 제2 방향으로 상기 제2 도전성 상부 패턴으로부터 연장된 제2 브릿지부; 및A second bridge portion extending from the second conductive upper pattern in the second direction; And
    상기 제1 도전성 상부 패턴에 실장된 발광 다이오드 칩을 포함하는 발광 디바이스.And a light emitting diode chip mounted on the first conductive upper pattern.
  18. 청구항 17에 있어서,The method according to claim 17,
    상기 제1 브릿지부, 상기 제2 브릿지부, 상기 제1 도전성 상부 패턴 및 상기 제2 도전성 상부 패턴의 일부를 덮는 반사부; 및A reflector covering a portion of the first bridge portion, the second bridge portion, the first conductive upper pattern and the second conductive upper pattern; And
    상기 반사부 상에 위치한 렌즈부를 더 포함하는 발광 디바이스.And a lens portion located on the reflecting portion.
  19. 청구항 17에 있어서,The method according to claim 17,
    상기 제1 브릿지부 및 상기 제2 브릿지부 각각의 폭은 상기 제1 방향으로 상기 제1 도전성 상부 패턴 및 상기 제2 도전성 상부 패턴 각각의 폭보다 작거나 같고, 상기 렌즈부의 반지름보다 큰 발광 디바이스.And a width of each of the first bridge portion and the second bridge portion is less than or equal to a width of each of the first conductive upper pattern and the second conductive upper pattern in the first direction, and larger than a radius of the lens portion.
  20. 청구항 17에 있어서,The method according to claim 17,
    상기 제2 도전성 하부 패턴은 상기 제1 방향으로 상이한 면적을 갖는 제1 영역 및 제2 영역을 포함하고,The second conductive lower pattern includes a first region and a second region having different areas in the first direction.
    상기 제1 및 제2 영역은 상기 제2 방향으로 서로 상이한 폭을 갖고, 상기 제2 영역의 폭은 상기 제1 영역의 폭보다 크고, 상기 제1 영역의 폭은 상기 제2 영역의 폭의 80% 이상이고, 상기 발광 다이오드 칩은 상기 제1 영역과 중첩된 영역에 실장되는 발광 디바이스.The first and second regions have different widths in the second direction, the width of the second region is greater than the width of the first region, and the width of the first region is 80 of the width of the second region. At least% and the light emitting diode chip is mounted in an area overlapping the first area.
  21. 청구항 17에 있어서,The method according to claim 17,
    상기 제1 도전성 상부 패턴, 상기 제2 도전성 상부 패턴, 제1 도전성 하부 패턴 및 상기 제2 도전성 하부 패턴은 상기 제1 방향과 대응되는 양측면으로 노출된 측면을 갖는 발광 디바이스.The first conductive upper pattern, the second conductive upper pattern, the first conductive lower pattern, and the second conductive lower pattern have side surfaces exposed to both sides corresponding to the first direction.
  22. 청구항 17에 있어서,The method according to claim 17,
    상기 제1 브릿지부의 노출된 측면과 상기 제1 도전성 상부 패턴의 노출된 측면은 서로 연결되고, 상기 제2 브릿지부의 노출된 측면과 상기 제1 도전성 상부 패턴의 노출된 측면은 서로 연결되는 발광 디바이스.The exposed side of the first bridge portion and the exposed side of the first conductive upper pattern are connected to each other, and the exposed side of the second bridge portion and the exposed side of the first conductive upper pattern are connected to each other.
PCT/KR2014/005020 2013-06-07 2014-06-05 Light-emitting device WO2014196833A1 (en)

Priority Applications (3)

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CN201480040661.5A CN105378953B (en) 2013-06-07 2014-06-05 Luminescent device
US14/896,558 US20160126437A1 (en) 2013-06-07 2014-06-05 Light-emitting device
US15/398,290 US20170117452A1 (en) 2013-06-07 2017-01-04 Light-emitting device

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KR10-2013-0065443 2013-06-07
KR20130065443 2013-06-07
KR10-2013-0095944 2013-08-13
KR20130095944 2013-08-13
KR20140064659A KR20140143701A (en) 2013-06-07 2014-05-28 Light emitting device and method of fabricating the same
KR10-2014-0064659 2014-05-28

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US15/398,290 Continuation US20170117452A1 (en) 2013-06-07 2017-01-04 Light-emitting device

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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531328B1 (en) * 2001-10-11 2003-03-11 Solidlite Corporation Packaging of light-emitting diode
JP2003258313A (en) * 2002-03-05 2003-09-12 Rohm Co Ltd Structure of light emitting device using led chip and its manufacturing method
KR100850666B1 (en) * 2007-03-30 2008-08-07 서울반도체 주식회사 Led package with metal pcb
KR20100092997A (en) * 2009-02-14 2010-08-24 정규문 Luminous apparatus and manufacturing method thereof
KR20110122495A (en) * 2010-05-04 2011-11-10 엘지이노텍 주식회사 Optical package and manufacturing method of the same

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6531328B1 (en) * 2001-10-11 2003-03-11 Solidlite Corporation Packaging of light-emitting diode
JP2003258313A (en) * 2002-03-05 2003-09-12 Rohm Co Ltd Structure of light emitting device using led chip and its manufacturing method
KR100850666B1 (en) * 2007-03-30 2008-08-07 서울반도체 주식회사 Led package with metal pcb
KR20100092997A (en) * 2009-02-14 2010-08-24 정규문 Luminous apparatus and manufacturing method thereof
KR20110122495A (en) * 2010-05-04 2011-11-10 엘지이노텍 주식회사 Optical package and manufacturing method of the same

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