WO2017101543A1 - Compression ring and semiconductor processing equipment - Google Patents

Compression ring and semiconductor processing equipment Download PDF

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Publication number
WO2017101543A1
WO2017101543A1 PCT/CN2016/099697 CN2016099697W WO2017101543A1 WO 2017101543 A1 WO2017101543 A1 WO 2017101543A1 CN 2016099697 W CN2016099697 W CN 2016099697W WO 2017101543 A1 WO2017101543 A1 WO 2017101543A1
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Prior art keywords
wafer
pressure ring
shielding portion
edge region
shielding
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PCT/CN2016/099697
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French (fr)
Chinese (zh)
Inventor
郭浩
赵梦欣
郑金果
侯珏
荣延栋
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北京北方微电子基地设备工艺研究中心有限责任公司
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Publication of WO2017101543A1 publication Critical patent/WO2017101543A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches

Definitions

  • the present invention relates to the field of semiconductor manufacturing, and in particular to a pressure ring and a semiconductor processing apparatus.
  • PVD physical vapor deposition
  • TSV through silicon via
  • Figure 1 is a plan view of a conventional press ring after the wafer is fixed.
  • the pressure ring includes an annular body 1, and a plurality of pressure claws 3 are disposed on an inner peripheral wall of the annular body 1, and the plurality of pressure claws 3 are spaced apart and evenly distributed along the circumferential direction of the annular body 1.
  • Each of the jaws 3 presses against the edge region of the upper surface of the wafer 2, thereby achieving fixation of the wafer 2.
  • Figure 2A is an enlarged partial cross-sectional view of the area A of Figure 1.
  • Figure 2B is an enlarged partial cross-sectional view of the area B of Figure 1.
  • the area A is a pressure claw region having a pressure claw 3 between the pressure ring and the wafer 2; and the B region is a non-claw region having no pressure claw 3 between the pressure ring and the wafer 2.
  • the metal ions for example, metal Al
  • the metal ions enter the gap during the deposition process, and Finally deposited on the side or back of the wafer 2, forming a metal coating, this layer of metal coating will greatly interfere with the subsequent process, and ultimately affect the process results.
  • the present invention is directed to at least one of the technical problems existing in the prior art, and proposes a pressure ring and a semiconductor processing apparatus which can solve the problem of depositing a metal plating film on the side or back side of a wafer, thereby improving the process result.
  • a pressure ring comprising a pressure ring body, on the inner ring wall of the pressure ring body, and a plurality of fixing portions and a plurality of shielding portions are disposed along a circumferential direction thereof, The plurality of fixing portions and the plurality of shielding portions are arranged to be arranged, wherein the fixing portion is for pressing the first edge region of the upper surface of the wafer when the pressing ring fixes the wafer; the shielding portion is The pressure ring is used to shield the second edge region of the upper surface of the wafer when the wafer is fixed.
  • the shielding portion is opposite to and above the second edge region.
  • the shielding portion presses the second edge region.
  • the size of the shielding portion follows the following formula:
  • a is the vertical spacing between the bottom surface of the shielding portion and the upper surface of the wafer when the pressure ring is fixed to the wafer;
  • D is the diameter of the wafer;
  • d is the occlusion The inner diameter of the part.
  • the vertical spacing between the bottom surface of the shielding portion and the upper surface of the wafer is 0.3 mm.
  • one-half of the difference between the diameter of the wafer and the inner diameter of the shielding portion is equal to 1 mm.
  • a concave portion is formed at a position of the bottom surface of the fixing portion close to the axial center of the pressure ring body to reduce the contact area of the fixing portion with the upper surface of the wafer.
  • a first recess is formed at a position of a bottom surface of the fixing portion near an axis of the pressing ring body to reduce a contact area of the fixing portion with an upper surface of the wafer; and a bottom surface of the shielding portion
  • a second recess is formed at a position close to the axis of the pressure ring body to reduce the contact area of the shielding portion with the upper surface of the wafer.
  • the present invention also provides a semiconductor processing apparatus including a process chamber in which a susceptor for carrying a wafer and a pressure ring for pressing by pressing the said chamber are provided An edge region of the upper surface of the wafer is used to secure the wafer to the susceptor, and the pressure ring employs any of the above-described pressure rings provided by the present invention.
  • the semiconductor processing apparatus includes a physical vapor deposition apparatus for depositing a Cu film, a Ti film, an Al film, an AlN film, a TiN film, an ITO film, an AlCu 4 film, or the like on the upper surface of the wafer.
  • TiW film a physical vapor deposition apparatus for depositing a Cu film, a Ti film, an Al film, an AlN film, a TiN film, an ITO film, an AlCu 4 film, or the like on the upper surface of the wafer.
  • the semiconductor processing device comprises an etching device or a pre-cleaning device.
  • the present invention provides a pressure ring which can fix a wafer by pressing a first edge region of the upper surface of the wafer by means of a fixing portion.
  • a fixing portion ie, the portion of the edge region of the upper surface of the wafer that is not covered by the fixing portion.
  • the semiconductor processing apparatus provided by the invention can block the gap between the pressure ring body and the wafer by using the pressure ring provided by the invention, so that metal ions can be prevented from being sputtered to the side or the back surface of the wafer through the gap, thereby improving Process results.
  • Figure 1 is a plan view of a conventional pressure ring after fixing a wafer
  • Figure 2A is an enlarged partial cross-sectional view of the area A of Figure 1;
  • Figure 2B is an enlarged partial cross-sectional view of the area B of Figure 1;
  • Figure 3 is a bottom plan view of a pressure ring according to a first embodiment of the present invention.
  • Figure 4A is an enlarged partial cross-sectional view of the fixing portion of Figure 3;
  • Figure 4B is an enlarged partial cross-sectional view of the shielding portion of Figure 3;
  • 4C is an effect view of the shielding portion of FIG. 3 when the process is performed
  • Figure 5A is a bottom view of a pressure ring according to a second embodiment of the present invention.
  • Figure 5B is an enlarged partial cross-sectional view of the pressure ring of Figure 5A.
  • FIG. 3 is a bottom plan view of a pressure ring according to a first embodiment of the present invention.
  • the pressure ring includes a pressure ring body 11 having a closed ring structure, and on the inner ring wall of the pressure ring body 11, and a plurality of fixing portions 121 are disposed along the circumferential direction thereof.
  • a plurality of shielding portions 122, a plurality of fixing portions 121 and a plurality of shielding portions 122 are arranged at intervals, that is, the plurality of fixing portions 121 and the plurality of shielding portions 122 surround the pressing ring body 11 along the circumferential direction of the pressing ring body 11.
  • a shielding portion 122 is disposed between each of the two adjacent fixing portions 121.
  • FIG. 4A is an enlarged partial cross-sectional view of the fixing portion of FIG. 3.
  • the fixing portion 121 when the pressure ring fixes the wafer 13, the fixing portion 121 is used to press the first edge region of the upper surface of the wafer 13, thereby achieving fixation of the wafer 13.
  • the inner diameter D2 of the fixing portion 121 is smaller than the diameter of the wafer 13, and the bottom surface of the fixing portion 121 is in contact with the first edge region of the upper surface of the wafer 13, which is the fixed portion 121 on the wafer 13. Covered area.
  • a recess 123 is formed at a position close to the axial center of the press ring body 11 at the bottom surface of the fixing portion 121 (ie, the surface opposite to the upper surface of the wafer 13), and the width of the recess 123 in the radial direction of the wafer 13 is smaller than the fixed
  • the width of the region where the portion 121 is in contact with the upper surface of the wafer 13, that is, the width of the recess portion 123 in the radial direction of the wafer 13 is smaller than the width of the first edge region.
  • the shielding portion 122 is for shielding a second edge region of the upper surface of the wafer 13, that is, a portion of the edge region of the upper surface of the wafer 13 that is not covered by the fixing portion 121.
  • the shielding portion 122 is opposite to and above the second edge region. Since the inner ring diameter D1 of the pressure ring body 11 is larger than the diameter of the wafer 13, when the pressure ring is fixed to the wafer 13, there is a gap between the wafer 13 and the pressure ring body 11, in which case the shielding portion 122 is equivalent.
  • FIG. 4C is an effect view of the shielding portion of FIG. 3 when the process is performed.
  • the metal ions are only sputtered to the shielding portion 122 without being sputtered to the side or the back surface of the wafer 13 through the gap.
  • the process results can be improved.
  • the shielding portion 122 above the second edge region without conforming to the second edge region, the contact area with the upper surface of the wafer 13 is not increased under the premise of shielding. The metal area deposited on the upper surface of the wafer 13 is not affected.
  • the size of the shielding portion 122 follows the following formula:
  • a is the vertical distance between the bottom surface 122a of the shielding portion 122 and the upper surface of the wafer 13 when the pressure ring is fixed to the wafer 13;
  • D is the diameter of the wafer 13; and
  • d is the inner diameter D2 of the shielding portion 122.
  • the size of the shielding portion 122 can be ensured that the metal is not sputtered to the side or the back surface of the wafer 13 by following the above formula, wherein 1/7, 1/8, 1/9 or 1/10 is preferable.
  • the vertical spacing a between the bottom surface 122a of the shielding portion 122 and the upper surface of the wafer 13 may be 0.3 mm, and the diameter D of the wafer 13 and the inner diameter D2 of the shielding portion 122 may be selected.
  • Figure 5A is a bottom plan view of a pressure ring according to a second embodiment of the present invention.
  • Figure 5B is an enlarged partial cross-sectional view of the pressure ring of Figure 5A.
  • the pressure ring provided in this embodiment includes a pressure ring body 21 having a closed ring structure, and an annular stack is disposed on the inner ring wall of the pressure ring body 21.
  • the pressing portion 22 has a closed ring structure which presses the entire edge region of the upper surface of the wafer 24 when the pressure ring fixes the wafer 24.
  • the annular lamination portion 22 can be regarded as being composed of a plurality of fixing portions and a plurality of shielding portions which are integrally connected, wherein the structure of the fixing portion in this embodiment
  • the structure of the fixing portion 121 in the first embodiment described above is exactly the same, for pressing the first edge region of the upper surface of the wafer 24.
  • the structure of the shielding portion in this embodiment is different from the structure of the shielding portion 122 in the first embodiment, and the difference is only that the shielding portion in the embodiment presses the second edge region of the upper surface of the wafer, that is, The bottom surface of the shielding portion is in contact with the second edge region of the upper surface of the wafer, which can also achieve the shielding effect on the gap between the pressing ring body 21 and the wafer 24, thereby preventing metal ions from being sputtered to the wafer through the gap. Side or back, which in turn improves process results.
  • a recess 23 is formed at a position close to the axial center of the ring body 21 of the bottom surface of the annular lamination portion 22 (i.e., the surface opposite to the upper surface of the wafer 24), the recess 23 being in the radial direction of the wafer 24.
  • the width is smaller than the width of the region where the annular lamination portion 22 is in contact with the upper surface of the wafer 24, that is, the width of the recess 23 in the radial direction of the wafer 24 is smaller than the width of the first edge region.
  • the contact area of the annular lamination portion 22 with the upper surface of the wafer 24 is reduced, so that the metal area deposited on the upper surface of the wafer 24 can be increased, and the process result can be improved.
  • the inner diameter of the contact area of the annular lamination portion 22 with the upper surface of the wafer 24 is D3.
  • the annular concave portion 23 can be regarded as being composed of the first concave portion and The second recess is formed, wherein the first recess is disposed at a position of the bottom surface of the fixing portion near the axis of the pressing ring body 21 to reduce the contact area of the fixing portion with the upper surface of the wafer 24.
  • the second recess is provided at a position of the bottom surface of the shielding portion near the axis of the pressure ring body 21 to reduce the contact area of the shielding portion with the upper surface of the wafer 24.
  • an embodiment of the present invention further provides a semiconductor processing apparatus including a process chamber in which a susceptor for carrying a wafer and a pressure ring are disposed, wherein the pressure ring is used for passing pressure The edge region of the upper surface of the wafer is held to secure the wafer to the pedestal.
  • the pressure ring can adopt one of various pressure rings provided by the embodiments of the present invention.
  • the semiconductor processing apparatus may be a physical vapor deposition apparatus for depositing a Cu film, a Ti film, an Al film, an AlN film, a TiN film, an ITO film, an AlCu 4 film, or a TiW on the upper surface of the wafer. film.
  • the semiconductor processing apparatus may be an etching apparatus or a pre-cleaning apparatus for performing an etching process on the wafer.
  • the semiconductor processing apparatus provided by the embodiment of the present invention can prevent the metal from being sputtered to the side or the back side of the wafer by using the above-mentioned pressure ring provided by the embodiment of the present invention, thereby improving the process result. Further, when the concave portion is provided on the bottom surface of the fixing portion and/or the shielding portion, it is possible to ensure even increase the metal area deposited on the upper surface of the wafer, thereby further improving the process result.

Abstract

Disclosed are a compression ring and a semiconductor processing equipment. The compression ring comprises a compression ring body (11, 21) on the inner ring wall of which a plurality of fixing portions (121) and a plurality of shielding portions (122) are provided at intervals in circumferential direction thereof, wherein a plurality of the fixing portions (121) and a plurality of the shielding portions (122) are arranged alternately, the fixing portions (121) serving to compress a first edge area of the upper surface of a wafer (13, 24) and the shielding portions (122) serving to shield a second edge area of the upper surface of the wafer (13, 24). The above-described compassion ring can solve the problem that metal plating coating is deposition on the side or back side of the wafer (13, 24), so that the process results can be improved.

Description

压环及半导体加工设备Pressure ring and semiconductor processing equipment 技术领域Technical field
本发明涉及半导体制造领域,具体地,涉及一种压环及半导体加工设备。The present invention relates to the field of semiconductor manufacturing, and in particular to a pressure ring and a semiconductor processing apparatus.
背景技术Background technique
在集成电路的制造过程中,通常采用物理气相沉积(Physical Vapor Deposition,以下简称PVD)技术进行在晶片上沉积金属层等材料的沉积工艺。随着硅通孔(Through Silicon Via,以下简称TSV)技术的广泛应用,PVD技术主要被应用于在硅通孔内沉积阻挡层和铜籽晶层。在进行硅通孔的沉积工艺时,通常采用压环(clamp ring)对晶片进行固定。In the manufacturing process of an integrated circuit, a physical vapor deposition (PVD) technique is generally used to deposit a material such as a metal layer on a wafer. With the wide application of through silicon via (TSV) technology, PVD technology is mainly applied to deposit a barrier layer and a copper seed layer in a through silicon via. In the deposition process of the through silicon via, the wafer is usually fixed by a clamp ring.
图1为现有的压环在固定晶片后的俯视图。请参阅图1,压环包括环状本体1,在该环状本体1的内周壁上设置有多个压爪3,多个压爪3沿环状本体1的周向间隔、且均匀分布。各个压爪3压住晶片2上表面的边缘区域,从而实现对晶片2的固定。Figure 1 is a plan view of a conventional press ring after the wafer is fixed. Referring to Fig. 1, the pressure ring includes an annular body 1, and a plurality of pressure claws 3 are disposed on an inner peripheral wall of the annular body 1, and the plurality of pressure claws 3 are spaced apart and evenly distributed along the circumferential direction of the annular body 1. Each of the jaws 3 presses against the edge region of the upper surface of the wafer 2, thereby achieving fixation of the wafer 2.
图2A为图1中A区域的放大的局部剖视图。图2B为图1中B区域的放大的局部剖视图。请一并参阅图2A和图2B,A区域为压环与晶片2之间具有压爪3的压爪区域;B区域为压环与晶片2之间没有压爪3的非压爪区域。由于压环在B区域没有压住晶片2的边缘区域,且与晶片2之间存在间隙,这使得在进行沉积工艺的过程中,金属离子(以金属Al为例)会进入该间隙内,并最终沉积到晶片2的侧面或背面,形成金属镀膜,这层金属镀膜会极大干扰后续工艺,最终对工艺结果造成影响。 Figure 2A is an enlarged partial cross-sectional view of the area A of Figure 1. Figure 2B is an enlarged partial cross-sectional view of the area B of Figure 1. Referring to FIG. 2A and FIG. 2B together, the area A is a pressure claw region having a pressure claw 3 between the pressure ring and the wafer 2; and the B region is a non-claw region having no pressure claw 3 between the pressure ring and the wafer 2. Since the pressure ring does not press the edge region of the wafer 2 in the B region and there is a gap with the wafer 2, the metal ions (for example, metal Al) enter the gap during the deposition process, and Finally deposited on the side or back of the wafer 2, forming a metal coating, this layer of metal coating will greatly interfere with the subsequent process, and ultimately affect the process results.
发明内容Summary of the invention
本发明旨在至少解决现有技术中存在的技术问题之一,提出了一种压环及半导体加工设备,其可以解决晶片的侧面或背面沉积有金属镀膜的问题,从而可以改善工艺结果。SUMMARY OF THE INVENTION The present invention is directed to at least one of the technical problems existing in the prior art, and proposes a pressure ring and a semiconductor processing apparatus which can solve the problem of depositing a metal plating film on the side or back side of a wafer, thereby improving the process result.
为实现本发明的目的而提供一种压环,包括压环本体,在所述压环本体的内环壁上,且沿其周向间隔设置有多个固定部和多个遮挡部,所述多个固定部和多个遮挡部相间排布,其中,所述固定部在所述压环对所述晶片进行固定时,用于压住晶片上表面的第一边缘区域;所述遮挡部在所述压环对所述晶片进行固定时,用于遮挡晶片上表面的第二边缘区域。To achieve the object of the present invention, a pressure ring is provided, comprising a pressure ring body, on the inner ring wall of the pressure ring body, and a plurality of fixing portions and a plurality of shielding portions are disposed along a circumferential direction thereof, The plurality of fixing portions and the plurality of shielding portions are arranged to be arranged, wherein the fixing portion is for pressing the first edge region of the upper surface of the wafer when the pressing ring fixes the wafer; the shielding portion is The pressure ring is used to shield the second edge region of the upper surface of the wafer when the wafer is fixed.
其中,在所述压环对所述晶片进行固定时,所述遮挡部与所述第二边缘区域相对,且位于其上方。。Wherein, when the pressure ring fixes the wafer, the shielding portion is opposite to and above the second edge region. .
其中,在所述压环对所述晶片进行固定时,所述遮挡部压住所述第二边缘区域。Wherein, when the pressure ring fixes the wafer, the shielding portion presses the second edge region.
其中,所述遮挡部的尺寸遵循以下公式:Wherein, the size of the shielding portion follows the following formula:
Figure PCTCN2016099697-appb-000001
Figure PCTCN2016099697-appb-000001
其中,a为在所述压环对所述晶片进行固定时,所述遮挡部的底面和所述晶片的上表面之间的竖直间距;D为所述晶片的直径;d为所述遮挡部的内径。Where a is the vertical spacing between the bottom surface of the shielding portion and the upper surface of the wafer when the pressure ring is fixed to the wafer; D is the diameter of the wafer; d is the occlusion The inner diameter of the part.
其中,所述遮挡部的底面和所述晶片的上表面之间的竖直间距为0.3mm。Wherein, the vertical spacing between the bottom surface of the shielding portion and the upper surface of the wafer is 0.3 mm.
其中,所述晶片的直径与所述遮挡部的内径的差值的二分之一等于1mm。Wherein, one-half of the difference between the diameter of the wafer and the inner diameter of the shielding portion is equal to 1 mm.
其中,在所述固定部的底面的靠近压环本体的轴心的位置处形成有凹部,用以减少所述固定部与所述晶片上表面的接触面积。 Wherein, a concave portion is formed at a position of the bottom surface of the fixing portion close to the axial center of the pressure ring body to reduce the contact area of the fixing portion with the upper surface of the wafer.
其中,在所述固定部的底面的靠近压环本体的轴心的位置处形成有第一凹部,用以减少所述固定部与所述晶片上表面的接触面积;在所述遮挡部的底面的靠近压环本体的轴心的位置处形成有第二凹部,用以减少所述遮挡部与所述晶片上表面的接触面积。a first recess is formed at a position of a bottom surface of the fixing portion near an axis of the pressing ring body to reduce a contact area of the fixing portion with an upper surface of the wafer; and a bottom surface of the shielding portion A second recess is formed at a position close to the axis of the pressure ring body to reduce the contact area of the shielding portion with the upper surface of the wafer.
作为另一个技术方案,本发明还提供一种半导体加工设备,包括工艺腔室,在所述工艺腔室内设置有用于承载晶片的基座以及压环,所述压环用于通过压住所述晶片上表面的边缘区域,来将所述晶片固定在所述基座上,所述压环采用了本发明提供的上述任意一种压环。As another technical solution, the present invention also provides a semiconductor processing apparatus including a process chamber in which a susceptor for carrying a wafer and a pressure ring for pressing by pressing the said chamber are provided An edge region of the upper surface of the wafer is used to secure the wafer to the susceptor, and the pressure ring employs any of the above-described pressure rings provided by the present invention.
其中,所述半导体加工设备包括物理气相沉积设备,所述物理气相沉积设备用于在所述晶片上表面沉积Cu薄膜、Ti薄膜、Al薄膜、AlN薄膜、TiN薄膜、ITO薄膜、AlCu4薄膜或者TiW薄膜。Wherein the semiconductor processing apparatus includes a physical vapor deposition apparatus for depositing a Cu film, a Ti film, an Al film, an AlN film, a TiN film, an ITO film, an AlCu 4 film, or the like on the upper surface of the wafer. TiW film.
其中,所述半导体加工设备包括刻蚀设备或者预清洗设备。Wherein, the semiconductor processing device comprises an etching device or a pre-cleaning device.
本发明具有以下有益效果:The invention has the following beneficial effects:
本发明提供的压环,其通过借助固定部压住晶片上表面的第一边缘区域,可以实现对晶片的固定。同时,通过借助遮挡部遮挡晶片上表面的第二边缘区域(即,晶片上表面的边缘区域中未被固定部覆盖的部分),可以遮挡压环本体与晶片之间的间隙,从而可以避免金属离子通过该间隙溅射到晶片的侧面或背面,进而可以改善工艺结果。The present invention provides a pressure ring which can fix a wafer by pressing a first edge region of the upper surface of the wafer by means of a fixing portion. At the same time, by blocking the second edge region of the upper surface of the wafer by the shielding portion (ie, the portion of the edge region of the upper surface of the wafer that is not covered by the fixing portion), the gap between the pressing ring body and the wafer can be blocked, thereby avoiding metal Ions are sputtered through the gap to the side or back of the wafer, which in turn improves the process.
本发明提供的半导体加工设备,其通过采用本发明提供的压环,可以遮挡压环本体与晶片之间的间隙,从而可以避免金属离子通过该间隙溅射到晶片的侧面或背面,进而可以改善工艺结果。The semiconductor processing apparatus provided by the invention can block the gap between the pressure ring body and the wafer by using the pressure ring provided by the invention, so that metal ions can be prevented from being sputtered to the side or the back surface of the wafer through the gap, thereby improving Process results.
附图说明DRAWINGS
图1为现有的压环在固定晶片后的俯视图;Figure 1 is a plan view of a conventional pressure ring after fixing a wafer;
图2A为图1中A区域的放大的局部剖视图;Figure 2A is an enlarged partial cross-sectional view of the area A of Figure 1;
图2B为图1中B区域的放大的局部剖视图; Figure 2B is an enlarged partial cross-sectional view of the area B of Figure 1;
图3为本发明第一实施例提供的压环的仰视图;Figure 3 is a bottom plan view of a pressure ring according to a first embodiment of the present invention;
图4A为图3中固定部的放大的局部剖视图;Figure 4A is an enlarged partial cross-sectional view of the fixing portion of Figure 3;
图4B为图3中遮挡部的放大的局部剖视图;Figure 4B is an enlarged partial cross-sectional view of the shielding portion of Figure 3;
图4C为图3中遮挡部进行工艺时的效果图;4C is an effect view of the shielding portion of FIG. 3 when the process is performed;
图5A为本发明第二实施例提供的压环的仰视图;以及Figure 5A is a bottom view of a pressure ring according to a second embodiment of the present invention;
图5B为图5A中压环的放大的局部剖视图。Figure 5B is an enlarged partial cross-sectional view of the pressure ring of Figure 5A.
具体实施方式detailed description
为使本领域的技术人员更好地理解本发明的技术方案,下面结合附图来对本发明提供的压环及半导体加工设备进行详细描述。In order to enable those skilled in the art to better understand the technical solutions of the present invention, the pressure ring and the semiconductor processing apparatus provided by the present invention are described in detail below with reference to the accompanying drawings.
图3为本发明第一实施例提供的压环的仰视图。请参阅图3,压环包括压环本体11,该压环本体11呈闭合的环体结构,且在压环本体11的内环壁上,且沿其周向间隔设置有多个固定部121和多个遮挡部122,多个固定部121和多个遮挡部122相间排布,也就是说,多个固定部121和多个遮挡部122沿压环本体11的周向环绕压环本体11而设置,且每每相邻的两个固定部121之间设置有一个遮挡部122。Figure 3 is a bottom plan view of a pressure ring according to a first embodiment of the present invention. Referring to FIG. 3, the pressure ring includes a pressure ring body 11 having a closed ring structure, and on the inner ring wall of the pressure ring body 11, and a plurality of fixing portions 121 are disposed along the circumferential direction thereof. And a plurality of shielding portions 122, a plurality of fixing portions 121 and a plurality of shielding portions 122 are arranged at intervals, that is, the plurality of fixing portions 121 and the plurality of shielding portions 122 surround the pressing ring body 11 along the circumferential direction of the pressing ring body 11. Provided, and a shielding portion 122 is disposed between each of the two adjacent fixing portions 121.
其中,图4A为图3中固定部的放大的局部剖视图。请参阅图4A,当压环对晶片13进行固定时,固定部121用于压住晶片13上表面的第一边缘区域,从而实现对晶片13的固定。具体来说,固定部121的内径D2小于晶片13的直径,且固定部121的底面与晶片13上表面的第一边缘区域相接触,该第一边缘区域即为晶片13上的被固定部121覆盖的区域。优选的,在固定部121的底面(即与晶片13上表面相对的表面)的靠近压环本体11的轴心的位置处形成有凹部123,该凹部123在晶片13的径向上的宽度小于固定部121与晶片13的上表面相接触的区域的宽度,即,该凹部123在晶片13的径向上的宽度小于第一边缘区域的宽度。通过设置凹部123,用以减少固定部121与晶片13的上 表面的接触面积,从而可以增大沉积在晶片13的上表面的金属面积,进而可以改善工艺结果。4A is an enlarged partial cross-sectional view of the fixing portion of FIG. 3. Referring to FIG. 4A, when the pressure ring fixes the wafer 13, the fixing portion 121 is used to press the first edge region of the upper surface of the wafer 13, thereby achieving fixation of the wafer 13. Specifically, the inner diameter D2 of the fixing portion 121 is smaller than the diameter of the wafer 13, and the bottom surface of the fixing portion 121 is in contact with the first edge region of the upper surface of the wafer 13, which is the fixed portion 121 on the wafer 13. Covered area. Preferably, a recess 123 is formed at a position close to the axial center of the press ring body 11 at the bottom surface of the fixing portion 121 (ie, the surface opposite to the upper surface of the wafer 13), and the width of the recess 123 in the radial direction of the wafer 13 is smaller than the fixed The width of the region where the portion 121 is in contact with the upper surface of the wafer 13, that is, the width of the recess portion 123 in the radial direction of the wafer 13 is smaller than the width of the first edge region. By providing the recess 123, the fixing portion 121 and the upper surface of the wafer 13 are reduced. The contact area of the surface, thereby increasing the area of the metal deposited on the upper surface of the wafer 13, can further improve the process results.
图4B为图3中遮挡部的放大的局部剖视图。请参阅图4B,遮挡部122用于遮挡晶片13的上表面的第二边缘区域,该第二边缘区域即为晶片13上表面的边缘区域中未被固定部121覆盖的部分。当压环对晶片13进行固定时,该遮挡部122与第二边缘区域相对,且位于其上方。由于压环本体11的内环直径D1大于晶片13的直径,因而在压环对晶片13进行固定时,晶片13与压环本体11之间存在间隙,在这种情况下,遮挡部122相当于在该间隙上方形成一个“屋檐”,可以起到遮挡压环本体11与晶片13之间的间隙的作用。图4C为图3中遮挡部进行工艺时的效果图。如图4C所示,在进行沉积工艺的过程中,在遮挡部122的遮挡作用下,金属离子只会溅射到遮挡部122,而不会通过该间隙溅射到晶片13的侧面或背面,从而可以改善工艺结果。此外,通过使遮挡部122位于第二边缘区域的上方,而不与该第二边缘区域相贴合,可以在起到遮挡作用的前提下,不会增加与晶片13上表面的接触面积,从而不会影响沉积在晶片13上表面的金属面积。4B is an enlarged partial cross-sectional view of the shielding portion of FIG. 3. Referring to FIG. 4B, the shielding portion 122 is for shielding a second edge region of the upper surface of the wafer 13, that is, a portion of the edge region of the upper surface of the wafer 13 that is not covered by the fixing portion 121. When the pressure ring fixes the wafer 13, the shielding portion 122 is opposite to and above the second edge region. Since the inner ring diameter D1 of the pressure ring body 11 is larger than the diameter of the wafer 13, when the pressure ring is fixed to the wafer 13, there is a gap between the wafer 13 and the pressure ring body 11, in which case the shielding portion 122 is equivalent. Forming an "an eave" above the gap serves to shield the gap between the pressure ring body 11 and the wafer 13. 4C is an effect view of the shielding portion of FIG. 3 when the process is performed. As shown in FIG. 4C, during the deposition process, under the shielding effect of the shielding portion 122, the metal ions are only sputtered to the shielding portion 122 without being sputtered to the side or the back surface of the wafer 13 through the gap. Thereby the process results can be improved. In addition, by disposing the shielding portion 122 above the second edge region without conforming to the second edge region, the contact area with the upper surface of the wafer 13 is not increased under the premise of shielding. The metal area deposited on the upper surface of the wafer 13 is not affected.
优选的,遮挡部122的尺寸遵循以下公式:Preferably, the size of the shielding portion 122 follows the following formula:
Figure PCTCN2016099697-appb-000002
Figure PCTCN2016099697-appb-000002
其中,a为在压环对晶片13进行固定时,遮挡部122的底面122a和晶片13的上表面之间的竖直间距;D为晶片13的直径;d为遮挡部122的内径D2。遮挡部122的尺寸通过遵循上述公式,可以保证金属不会溅射到晶片13的侧面或背面,其中,优选1/7,1/8,1/9或1/10。另外,在上述范围外,还可以选用,遮挡部122的底面122a和晶片13的上表面之间的竖直间距a的取值为0.3mm,晶片13的直径D与遮挡部122的内径D2的差值的二分之一等于1mm,即,(D-d)×0.5=b,且 b=1mm,其中b为晶片13与遮挡部122重叠的部分的宽度。Where a is the vertical distance between the bottom surface 122a of the shielding portion 122 and the upper surface of the wafer 13 when the pressure ring is fixed to the wafer 13; D is the diameter of the wafer 13; and d is the inner diameter D2 of the shielding portion 122. The size of the shielding portion 122 can be ensured that the metal is not sputtered to the side or the back surface of the wafer 13 by following the above formula, wherein 1/7, 1/8, 1/9 or 1/10 is preferable. In addition, outside the above range, the vertical spacing a between the bottom surface 122a of the shielding portion 122 and the upper surface of the wafer 13 may be 0.3 mm, and the diameter D of the wafer 13 and the inner diameter D2 of the shielding portion 122 may be selected. One-half of the difference is equal to 1 mm, ie, (Dd) × 0.5 = b, and b = 1 mm, where b is the width of the portion of the wafer 13 that overlaps the blocking portion 122.
图5A为本发明第二实施例提供的压环的仰视图。图5B为图5A中压环的放大的局部剖视图。请一并参阅图5A和图5B,本实施例提供的压环包括压环本体21,该压环本体21呈闭合的环体结构,且在压环本体21的内环壁上设置有环形叠压部22,该环形叠压部22呈闭合的环体结构,当压环对晶片24进行固定时,该环形叠压部22压住晶片24的上表面的整个边缘区域。Figure 5A is a bottom plan view of a pressure ring according to a second embodiment of the present invention. Figure 5B is an enlarged partial cross-sectional view of the pressure ring of Figure 5A. Referring to FIG. 5A and FIG. 5B together, the pressure ring provided in this embodiment includes a pressure ring body 21 having a closed ring structure, and an annular stack is disposed on the inner ring wall of the pressure ring body 21. The pressing portion 22 has a closed ring structure which presses the entire edge region of the upper surface of the wafer 24 when the pressure ring fixes the wafer 24.
进一步说,与上述第一实施例相类似的,可以将上述环形叠压部22视为由连为一体的多个固定部和多个遮挡部组成的,其中,本实施例中固定部的结构与上述第一实施例中固定部121的结构完全相同,用于压住晶片24上表面的第一边缘区域。而本实施例中的遮挡部的结构与上述第一实施例中的遮挡部122的结构不同,且区别仅在于:本实施例中的遮挡部压住晶片上表面的第二边缘区域,即,遮挡部的底面与晶片上表面的第二边缘区域相接触,这同样可以实现对压环本体21与晶片24之间的间隙的遮挡作用,从而可以避免有金属离子通过该间隙溅射到晶片的侧面或背面,进而可以改善工艺结果。Further, similar to the first embodiment described above, the annular lamination portion 22 can be regarded as being composed of a plurality of fixing portions and a plurality of shielding portions which are integrally connected, wherein the structure of the fixing portion in this embodiment The structure of the fixing portion 121 in the first embodiment described above is exactly the same, for pressing the first edge region of the upper surface of the wafer 24. The structure of the shielding portion in this embodiment is different from the structure of the shielding portion 122 in the first embodiment, and the difference is only that the shielding portion in the embodiment presses the second edge region of the upper surface of the wafer, that is, The bottom surface of the shielding portion is in contact with the second edge region of the upper surface of the wafer, which can also achieve the shielding effect on the gap between the pressing ring body 21 and the wafer 24, thereby preventing metal ions from being sputtered to the wafer through the gap. Side or back, which in turn improves process results.
优选的,在上述环形叠压部22的底面(即与晶片24上表面相对的表面)的靠近压环本体21的轴心的位置处形成有凹部23,该凹部23在晶片24的径向上的宽度小于环形叠压部22与晶片24的上表面相接触的区域的宽度,即,该凹部23在晶片24的径向上的宽度小于第一边缘区域的宽度。通过设置凹部23,用以减少环形叠压部22与晶片24上表面的接触面积,从而可以增大沉积在晶片24上表面的金属面积,进而可以改善工艺结果。其中,环形叠压部22与晶片24上表面的接触面积的内径为D3。Preferably, a recess 23 is formed at a position close to the axial center of the ring body 21 of the bottom surface of the annular lamination portion 22 (i.e., the surface opposite to the upper surface of the wafer 24), the recess 23 being in the radial direction of the wafer 24. The width is smaller than the width of the region where the annular lamination portion 22 is in contact with the upper surface of the wafer 24, that is, the width of the recess 23 in the radial direction of the wafer 24 is smaller than the width of the first edge region. By providing the recess 23, the contact area of the annular lamination portion 22 with the upper surface of the wafer 24 is reduced, so that the metal area deposited on the upper surface of the wafer 24 can be increased, and the process result can be improved. The inner diameter of the contact area of the annular lamination portion 22 with the upper surface of the wafer 24 is D3.
进一步说,若将上述环形叠压部22视为由连为一体的多个固定部和多个遮挡部组成的,则对应地该环形凹部23可以视为由第一凹部和 第二凹部组成的,其中,第一凹部设置在固定部的底面的靠近压环本体21的轴心的位置处,用以减少该固定部与晶片24的上表面的接触面积。第二凹部设置在遮挡部的底面的靠近压环本体21的轴心的位置处,用以减少遮挡部与晶片24的上表面的接触面积。Further, if the annular lamination portion 22 is considered to be composed of a plurality of fixed portions and a plurality of shielding portions that are integrally connected, the annular concave portion 23 can be regarded as being composed of the first concave portion and The second recess is formed, wherein the first recess is disposed at a position of the bottom surface of the fixing portion near the axis of the pressing ring body 21 to reduce the contact area of the fixing portion with the upper surface of the wafer 24. The second recess is provided at a position of the bottom surface of the shielding portion near the axis of the pressure ring body 21 to reduce the contact area of the shielding portion with the upper surface of the wafer 24.
作为另一个技术方案,本发明实施例还提供一种半导体加工设备,其包括工艺腔室,在该工艺腔室内设置有用于承载晶片的基座以及压环,其中,该压环用于通过压住晶片上表面的边缘区域,来将晶片固定在基座上。而且,压环可以采用本发明实施例提供的各种压环之一。As another technical solution, an embodiment of the present invention further provides a semiconductor processing apparatus including a process chamber in which a susceptor for carrying a wafer and a pressure ring are disposed, wherein the pressure ring is used for passing pressure The edge region of the upper surface of the wafer is held to secure the wafer to the pedestal. Moreover, the pressure ring can adopt one of various pressure rings provided by the embodiments of the present invention.
在实际应用中,半导体加工设备可以为物理气相沉积设备,该物理气相沉积设备用于在晶片上表面沉积Cu薄膜、Ti薄膜、Al薄膜、AlN薄膜、TiN薄膜、ITO薄膜、AlCu4薄膜或者TiW薄膜。或者,半导体加工设备还可以为刻蚀设备或者预清洗设备,用于对晶片进行刻蚀工艺。In practical applications, the semiconductor processing apparatus may be a physical vapor deposition apparatus for depositing a Cu film, a Ti film, an Al film, an AlN film, a TiN film, an ITO film, an AlCu 4 film, or a TiW on the upper surface of the wafer. film. Alternatively, the semiconductor processing apparatus may be an etching apparatus or a pre-cleaning apparatus for performing an etching process on the wafer.
本发明实施例提供的半导体加工设备,其通过采用本发明实施例提供的上述压环,可以避免金属溅射到晶片的侧面或背面,从而可以改善工艺结果。进一步地,当在固定部和/或遮挡部的底面设置凹部时,可以确保甚至增大沉积在晶片的上表面的金属面积,从而进一步改善工艺结果。The semiconductor processing apparatus provided by the embodiment of the present invention can prevent the metal from being sputtered to the side or the back side of the wafer by using the above-mentioned pressure ring provided by the embodiment of the present invention, thereby improving the process result. Further, when the concave portion is provided on the bottom surface of the fixing portion and/or the shielding portion, it is possible to ensure even increase the metal area deposited on the upper surface of the wafer, thereby further improving the process result.
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式,然而本发明并不局限于此。对于本领域内的普通技术人员而言,在不脱离本发明的精神和实质的情况下,可以做出各种变型和改进,这些变型和改进也视为本发明的保护范围。 It is to be understood that the above embodiments are merely exemplary embodiments employed to explain the principles of the invention, but the invention is not limited thereto. Various modifications and improvements can be made by those skilled in the art without departing from the spirit and scope of the invention. These modifications and improvements are also considered to be within the scope of the invention.

Claims (11)

  1. 一种压环,包括压环本体,其特征在于,在所述压环本体的内环壁上,且沿其周向间隔设置有多个固定部和多个遮挡部,所述多个固定部和多个遮挡部相间排布,其中,A pressure ring includes a pressure ring body, wherein a plurality of fixing portions and a plurality of shielding portions are disposed on an inner ring wall of the pressure ring body and spaced apart in a circumferential direction thereof, the plurality of fixing portions Arranged with a plurality of shielding portions, wherein
    所述固定部在所述压环对所述晶片进行固定时,用于压住晶片上表面的第一边缘区域;The fixing portion is configured to press the first edge region of the upper surface of the wafer when the pressure ring fixes the wafer;
    所述遮挡部在所述压环对所述晶片进行固定时,用于遮挡晶片上表面的第二边缘区域;The shielding portion is configured to block a second edge region of the upper surface of the wafer when the pressing ring fixes the wafer;
  2. 根据权利要求1所述的压环,其特征在于,在所述压环对所述晶片进行固定时,所述遮挡部与所述第二边缘区域相对,且位于其上方。The pressure ring according to claim 1, wherein when the pressure ring fixes the wafer, the shielding portion is opposite to and above the second edge region.
  3. 根据权利要求1所述的压环,其特征在于,在所述压环对所述晶片进行固定时,所述遮挡部压住所述第二边缘区域。The pressure ring according to claim 1, wherein said blocking portion presses said second edge region when said pressure ring fixes said wafer.
  4. 根据权利要求2所述的压环,其特征在于,所述遮挡部的尺寸遵循以下公式:The pressure ring according to claim 2, wherein the size of the shielding portion follows the following formula:
    Figure PCTCN2016099697-appb-100001
    Figure PCTCN2016099697-appb-100001
    其中,a为在所述压环对所述晶片进行固定时,所述遮挡部的底面和所述晶片的上表面之间的竖直间距;D为所述晶片的直径;d为所述遮挡部的内径。Where a is the vertical spacing between the bottom surface of the shielding portion and the upper surface of the wafer when the pressure ring is fixed to the wafer; D is the diameter of the wafer; d is the occlusion The inner diameter of the part.
  5. 根据权利要求2所述的压环,其特征在于,所述遮挡部的底面和所述晶片的上表面之间的竖直间距为0.3mm。The pressure ring according to claim 2, wherein a vertical pitch between the bottom surface of the shielding portion and the upper surface of the wafer is 0.3 mm.
  6. 根据权利要求2所述的压环,其特征在于,所述晶片的直径与所述 遮挡部的内径的差值的二分之一等于1mm。The pressure ring according to claim 2, wherein said wafer has a diameter and said One-half of the difference in the inner diameter of the shield is equal to 1 mm.
  7. 根据权利要求2所述的压环,其特征在于,在所述固定部的底面的靠近压环本体的轴心的位置处形成有凹部,用以减少所述固定部与所述晶片上表面的接触面积。The pressure ring according to claim 2, wherein a recess is formed at a position of a bottom surface of the fixing portion near an axis of the pressure ring body to reduce the fixing portion and the upper surface of the wafer Contact area.
  8. 根据权利要求3所述的压环,其特征在于,在所述固定部的底面的靠近压环本体的轴心的位置处形成有第一凹部,用以减少所述固定部与所述晶片上表面的接触面积;在所述遮挡部的底面的靠近压环本体的轴心的位置处形成有第二凹部,用以减少所述遮挡部与所述晶片上表面的接触面积。The pressure ring according to claim 3, wherein a first recess is formed at a position of a bottom surface of the fixing portion near an axis of the pressure ring body to reduce the fixing portion and the wafer a contact area of the surface; a second recess is formed at a position of the bottom surface of the shielding portion near the axis of the pressure ring body to reduce a contact area of the shielding portion with the upper surface of the wafer.
  9. 一种半导体加工设备,包括工艺腔室,在所述工艺腔室内设置有用于承载晶片的基座以及压环,所述压环用于通过压住所述晶片上表面的边缘区域,来将所述晶片固定在所述基座上,其特征在于,所述压环采用权利要求1-8任意一项所述的压环。A semiconductor processing apparatus includes a process chamber in which a susceptor for carrying a wafer and a pressure ring for pressing an edge region of an upper surface of the wafer to be placed The wafer is fixed to the susceptor, and the pressure ring is the pressure ring according to any one of claims 1-8.
  10. 根据权利要求9所述的半导体加工设备,其特征在于,所述半导体加工设备包括物理气相沉积设备,所述物理气相沉积设备用于在所述晶片上表面沉积Cu薄膜、Ti薄膜、Al薄膜、AlN薄膜、TiN薄膜、ITO薄膜、AlCu4薄膜或者TiW薄膜。The semiconductor processing apparatus according to claim 9, wherein said semiconductor processing apparatus comprises a physical vapor deposition apparatus for depositing a Cu thin film, a Ti thin film, an Al thin film, or the like on a surface of said wafer. AlN film, TiN film, ITO film, AlCu 4 film or TiW film.
  11. 根据权利要求9所述的半导体加工设备,其特征在于,所述半导体加工设备包括刻蚀设备或者预清洗设备。 The semiconductor processing apparatus according to claim 9, wherein said semiconductor processing apparatus comprises an etching apparatus or a pre-cleaning apparatus.
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