An endian domain conversion circuit for converting data packets transmitted between two bus interfaces. The novel system advantageously eliminates any requirement for a large bit switch within the circuit's write data path. Instead, endian conversion intelligence is placed into the read data path. Double...http://www.google.es/patents/US5961640?utm_source=gb-gplus-sharePatente US5961640 - Virtual contiguous FIFO having the provision of packet-driven automatic endian conversion
Virtual contiguous FIFO having the provision of packet-driven automatic ...
