For a non-volatile memory system, compressing the erase threshold voltage distribution into the lowest threshold voltage state will decrease the valid data threshold voltage window. Decreasing the valid data threshold voltage window reduces the floating gate to floating gate coupling effect. The compression...http://www.google.es/patents/US7397698?utm_source=gb-gplus-sharePatente US7397698 - Reducing floating gate to floating gate coupling effect
Reducing floating gate to floating gate coupling effect
