A method and apparatus are provided for implementing seamless error resumption in a shared memory bus structure. Controls and data are stored for each read operation and each write operation. Each read operation and each write operation is monitored to determine when an error has occurred for either...http://www.google.es/patents/US7191366?utm_source=gb-gplus-sharePatente US7191366 - Method and intelligent slave device transfer control unit for implementing seamless error resumption in a shared memory bus structure
Method and intelligent slave device transfer control unit for implementing ...
