A memory circuit includes a RAM having a memory cell section and a bit manipulation section for controlling a writing of a bit unit to the memory cell section. The RAM is configured to be able to be read and written at different timings by at least two devices. A register stores mask bits for controlling...http://www.google.es/patents/US5383154?utm_source=gb-gplus-sharePatente US5383154 - Memory circuit capable of executing a bit manipulation at a high speed
Memory circuit capable of executing a bit manipulation at a high speed
