The present invention stacks packaged integrated circuits into modules that conserve PWB or other board surface area. The invention provides techniques and structures for aggregating chip scale-packaged integrated circuits (CSPs) or leaded packages with other CSPs or with monolithic or stacked leaded...http://www.google.es/patents/US20030081392?utm_source=gb-gplus-sharePatente US20030081392 - Integrated circuit stacking system and method
Número de solicitud: 10/136,890 Número de publicación: US 2003/0081392 A1 Fecha de presentación: 2 May 2002 Patente emitida: US6940729 ( Fecha de emisión 6 Sep 2005)
