Top die pads are electrically relocated by forming holes through a semiconductor wafer between device active regions. An electrically insulating layer is formed over all exposed surfaces of the wafer, including within the holes, and openings are made in the insulating layer for access to the top interconnection...http://www.google.es/patents/US5888884?utm_source=gb-gplus-sharePatente US5888884 - Electronic device pad relocation, precision placement, and packaging in arrays
Electronic device pad relocation, precision placement, and packaging in arrays