Poor sidewall coverage of vias in substrates for multi-chip modules is alleviated by forming pillars associated with conductors on an underlying metal wiring layer. In one embodiment, the pillars are disposed underneath the conductors, causing portions of the conductors to be pushed up through an overlying...http://www.google.es/patents/US5436411?utm_source=gb-gplus-sharePatente US5436411 - Fabrication of substrates for multi-chip modules
