A delay circuit in a semiconductor memory device generates a sense amplifier enable signal having a delay time with respect to the timing of selection of one of memory cells. The delay time corresponds to the largest read time for the memory cell located at the most distant position and has an irregularity...http://www.google.es/patents/US6282133?utm_source=gb-gplus-sharePatente US6282133 - Semiconductor memory device having a delay circuit for generating a read timing
Semiconductor memory device having a delay circuit for generating a read timing
