A shared bypass bus structure for low-latency coherency controller access in a coherent scalable switch. In a coherent scalable switch with multiple coherent interconnect ports, distributed coherency control structures, and a crossbar interface between them, a shared bypass bus permits data transfer...http://www.google.es/patents/US20030163649?utm_source=gb-gplus-sharePatente US20030163649 - Shared bypass bus structure
Número de solicitud: 10/358,568 Número de publicación: US 2003/0163649 A1 Fecha de presentación: 5 Feb 2003 Patente emitida: US6912612 ( Fecha de emisión 28 Jun 2005)
