On-chip delivery of data from an on-chip or off-chip cache is separated into two buses. A fast fill bus provides data to latency critical caches without ECC error detection and correction. A slow fill bus provides the data to latency insensitive caches with ECC error detection and correction. Because...http://www.google.es/patents/US5912906?utm_source=gb-gplus-sharePatente US5912906 - Method and apparatus for recovering from correctable ECC errors
Method and apparatus for recovering from correctable ECC errors
