An apparatus for decoupling input/output (I/O) from host processing through main memory. A command packet architecture and distributed burst engine for communicating data to an I/O device without using memory mapped I/O or host processor synchronization. The packet architecture includes a header having...http://www.google.es/patents/US6128669?utm_source=gb-gplus-sharePatente US6128669 - System having a bridge with distributed burst engine to decouple input/output task from a processor
System having a bridge with distributed burst engine to decouple input ...
