This invention includes a capacitorless one transistor DRAM cell that includes a pair of spaced source/drain regions received within semiconductive material. An electrically floating body region is disposed between the source/drain regions within the semiconductive material. A first gate spaced is apart...http://www.google.es/patents/US20080012056?utm_source=gb-gplus-sharePatente US20080012056 - CAPACITORLESS ONE TRANSISTOR DRAM CELL, INTEGRATED CIRCUITRY COMPRISING AN ARRAY OF CAPACITORLESS ONE TRANSISTOR DRAM CELLS, AND METHOD OF FORMING LINES OF CAPACITORLESS ONE TRANSISTOR DRAM CELLS
CAPACITORLESS ONE TRANSISTOR DRAM CELL, INTEGRATED CIRCUITRY COMPRISING AN ...
Número de solicitud: 11/488,384 Número de publicación: US 2008/0012056 A1 Fecha de presentación: 17 Jul 2006 Patente emitida: US7602001 ( Fecha de emisión 13 Oct 2009)
