A stackable chip scale semiconductor package and a method for fabricating the package are provided. The package includes a substrate having a die mounting site wherein a semiconductor die is mounted. The package also includes first contacts formed on a first surface of the substrate, and second contacts...http://www.google.es/patents/US6013948?utm_source=gb-gplus-sharePatente US6013948 - Stackable chip scale semiconductor package with mating contacts on opposed surfaces
Stackable chip scale semiconductor package with mating contacts on opposed ...
