An MOS process for fabricating multi-layer integrated circuits particularly suited for SOS fabrication is disclosed. Transistors are fabricated both on the substrate level and in an overlying polysilicon layer. Processing techniques for aligning source and drain regions with a buried gate are described....http://www.google.es/patents/US4272880?utm_source=gb-gplus-sharePatente US4272880 - MOS/SOS Process
