In an address multiplexed dynamic random access memory (RAM) which has both a normal operation mode and a test mode capability, the test mode is initiated in response to particular signal level combinations of both the row address strobe (RAS) and column address strobe (CAS) signals and the write enable...http://www.google.es/patents/US5467314?utm_source=gb-gplus-sharePatente US5467314 - Method of testing an address multiplexed dynamic RAM
Method of testing an address multiplexed dynamic RAM
