A method is provided for forming interconnect structures for ULSI integrated circuits. Preferably, a barrier layer of a conductive material which forms a seed layer for metal deposition is provided selectively on the sidewalls and bottom of interconnect trenches defined in a dielectric layer, and a conformal...http://www.google.es/patents/US5354712?utm_source=gb-gplus-sharePatente US5354712 - Method for forming interconnect structures for integrated circuits
Method for forming interconnect structures for integrated circuits
