The present invention includes a memory subsystem comprising at least two semiconductor devices, including at least one memory device, connected to a bus, where the bus includes a plurality of bus lines for carrying substantially all address, data and control information needed by said memory devices,...http://www.google.es/patents/US6038195?utm_source=gb-gplus-sharePatente US6038195 - Synchronous memory device having a delay time register and method of operating same
Synchronous memory device having a delay time register and method of ...
