A semiconductor dynamic read/write memory of the multiplexed-address type employs an on-chip refresh counter which is activated by CAS-before-RAS sequence. This counter is made up of stages almost identical to the row address buffers so the same clocks can be used. Either the address input buffers or...http://www.google.es/patents/US4653030?utm_source=gb-gplus-sharePatente US4653030 - Self refresh circuitry for dynamic memory
