Disclosed is an improved burn-in and test method of semiconductor wafers each having numerous integrated circuits formed therein. It includes the steps of dividing each semiconductor wafer into blocks each including some integrated circuits; giving each block an address to indicate in which part of the...http://www.google.es/patents/US5534786?utm_source=gb-gplus-sharePatente US5534786 - Burn-in and test method of semiconductor wafers and burn-in boards for use in semiconductor wafer burn-in tests
Burn-in and test method of semiconductor wafers and burn-in boards for use ...
