An improved semiconductor memory structure and methods for its fabrication are disclosed. The memory structure includes a semiconductor substrate having a dielectric stack formed over a channel region of a semiconductor substrate. The dielectric stack includes a layer of electron trapping material that...http://www.google.es/patents/US6989565?utm_source=gb-gplus-sharePatente US6989565 - Memory device having an electron trapping layer in a high-K dielectric gate stack
Memory device having an electron trapping layer in a high-K dielectric gate ...
