Non-volatile memory devices and arrays are described that facilitate the use of band-gap engineered gate stacks with asymmetric tunnel barriers in reverse and normal mode floating node memory cells in NOR or NAND memory architectures that allow for direct tunnel programming and erase, while maintaining...http://www.google.es/patents/US20060261401?utm_source=gb-gplus-sharePatente US20060261401 - Novel low power non-volatile memory and gate stack
Novel low power non-volatile memory and gate stack
Número de solicitud: 11/131,006 Número de publicación: US 2006/0261401 A1 Fecha de presentación: 17 May 2005 Patente emitida: US7612403 ( Fecha de emisión 3 Nov 2009)
