An electrical structure or package, and associated method of formation. A plurality of logic chips is coupled electrically to a memory chip either through conductive members (e.g., solder balls) that interface with the memory chip and each logic chip, or through a sequential logic-to-memory electrically...http://www.google.es/patents/US6793123?utm_source=gb-gplus-sharePatente US6793123 - Packaging for multi-processor shared-memory system
Packaging for multi-processor shared-memory system
