A process of fabricating a memory cell that includes a substrate that has a first region and a second region with a channel therebetween by forming a gate above the channel of the substrate, forming a bitline and siliciding the bitline....http://www.google.es/patents/US7125763?utm_source=gb-gplus-sharePatente US7125763 - Silicided buried bitline process for a non-volatile memory cell
Silicided buried bitline process for a non-volatile memory cell
