A configuration for a conventional lead frame for conserving limited leads and for allowing the location of bond pads anywhere on the periphery of the semiconductor device and for reducing the cost of tooling changes by permitting the use of current tooling. The present invention utilizes an extended...http://www.google.es/patents/US7098527?utm_source=gb-gplus-sharePatente US7098527 - Integrated circuit package electrical enhancement with improved lead frame design
Integrated circuit package electrical enhancement with improved lead frame ...
