A multilayer semiconductor integrated circuit which does not suffer from latchup. The circuit comprises a semiconductor substrate, a first MOS transistor formed on the substrate, an interlayer insulator deposited on the first transistor, and a second MOS transistor formed on the interlayer insulator....http://www.google.es/patents/US5604137?utm_source=gb-gplus-sharePatente US5604137 - Method for forming a multilayer integrated circuit
Method for forming a multilayer integrated circuit
