An integrated circuit package system is provided including providing a wafer with bond pads formed on the wafer. A solder bump is deposited on one or more bond pads. The bond pads and the solder bump are embedded within a mold compound formed on the wafer. A groove is formed in the mold compound to expose...http://www.google.es/patents/US20090014899?utm_source=gb-gplus-sharePatente US20090014899 - INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE
INTEGRATED CIRCUIT PACKAGE SYSTEM INCLUDING STACKED DIE
Número de solicitud: 12/235,521 Número de publicación: US 2009/0014899 A1 Fecha de presentación: 22 Sep 2008 Patente emitida: US7652376 ( Fecha de emisión 26 Ene 2010)
