A method of fabricating a CMOS inverter including providing a heterostructure having a Si substrate, a relaxed Si1-x Gex layer on the Si substrate, and a strained surface layer on said relaxed Si1-x Gex layer; and integrating a pMOSFET and an nMOSFET in said heterostructure, wherein the channel of said...http://www.google.es/patents/US6649480?utm_source=gb-gplus-sharePatente US6649480 - Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETs
Method of fabricating CMOS inverter and integrated circuits utilizing ...
