A computer system includes a memory controller coupled to a memory module containing several DRAMs. The memory module also includes a non-volatile memory storing row addresses identifying rows containing DRAM memory cells that are likely to lose data during normal refresh of the memory cells. Upon power-up,...http://www.google.es/patents/US20060056260?utm_source=gb-gplus-sharePatente US20060056260 - Memory controller method and system compensating for memory cell data losses
Memory controller method and system compensating for memory cell data losses
Número de solicitud: 11/269,403 Número de publicación: US 2006/0056260 A1 Fecha de presentación: 7 Nov 2005 Patente emitida: US7447974 ( Fecha de emisión 4 Nov 2008)
