[54] METHOD FOR FORMING A FIELD-EFFECT TRANSISTOR INCLUDING ANODIC OXD3ATION OF THE GATE
[75] Inventors: Shunpei Yamazaki, Tokyo; Akira Mase, Aichi; Masaaki Hiroki, Kanagawa; Yasuhiko Takemura, Kanagawa; Hongyong Zhang, Kanagawa; Hideki Uochi, Kanagawa; Hideki Nemoto, Kanagawa, all of Japan
[73] Assignee: Semiconductor Energy Laboratory Co., Ltd., Kanagawa, Japan
[21] Appl. No.: 219,819
[22] Filed: Mar. 29,1994
Related U.S. Application Data
[60] Continuation of Ser. No. 998,729, Dec. 30, 1992, abandoned, which is a division of Ser. No. 922,759, Jul. 31,1992, abandoned, which is a continuation-in-part of Ser. No. 837,394, Feb. 18, 1992, Pat. No. 5,200,846.
[30] Foreign Application Priority Data
Feb. 16, 1991 [JP] Japan 3-77317
Feb. 16, 1991 [JP] Japan 3-77320
Feb. 16, 1991 [JP] Japan 3-77321
Mar. 27, 1991 [JP] Japan 3-87776
Mar. 27, 1991 [JP] Japan 3-89540
Aug. 23, 1991 [JP] Japan 3-237100
Nov. 29, 1991 [JP] Japan 3-340336
Jan. 24, 1992 [JP] Japan 4-034104
Jan. 29, 1992 [JP] Japan 4-038637
Feb. 5, 1992 [JP] Japan 4-054322
[51] Int. CI.6 H01L 21/265
[52] U.S. CI 437/42; 437/21; 437/29;
437/71; 437/170; 148/DIG. 117; 148/DIG. 163
[58] Field of Search 437/170, 983;
148/DIG. 117, DIG. 163
[56] References Cited
U.S. PATENT DOCUMENTS
3,798,752 3/1974 Fujimoto 437/71
4,420,870 12/1983 Kimura 437/29
4,466,172 8/1984 Batra 437/42
4,646,426 3/1987 Sasaki 437/187
4,755,865 7/1988 Wilson et al 257/754
4,905,066 2/1990 Dohjo et al 251/60
4,938,565 7/1990 Ichikawa 359/59
4,988,643 1/1991 Tsou 437/200
5,023,679 6/1991 Shibata 29/571
5,084,905 1/1992 Sasaki et al 257/776
5,102,361 4/1992 Katayamaetal 437/923
5,162,901 11/1992 Shimada et al 359/59
5,194,136 3/1993 Jeung et al 205/122
5,200,846 4/1993 Hiroki et al 359/57
Primary Examiner—George Fourson
Assistant Examiner—H. Jey Tsai
Attorney, Agent, or Firm—Sixbey, Friedman, Leedom &
Ferguson; Gerald J. Ferguson, Jr.; Evan R. Smith
[57] ABSTRACT
An insulated-gate field-effect transistor adapted to be used in an active-matrix liquid-crystal display. The channel length, or the distance between the source region and the drain region, is made larger than the length of the gate electrode taken in the longitudinal direction of the channel. Offset regions are formed in the channel region on the sides of the source and drain regions. No or very weak electric field is applied to these offset regions from the gate electrode.
11 Claims, 23 Drawing Sheets
