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United States Patent [w]

Todorobaru et al.

US006031288A [ii] Patent Number: 6,031,288 [45] Date of Patent: *Feb. 29,2000

[54] SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE FOR CONNECTING SEMICONDUCTOR REGION AND ELECTRICAL WIRING METAL VIA TITANIUM SILICIDE LAYER AND METHOD OF FABRICATION THEREOF

[75] Inventors: Hiromi Todorobaru, Kashiwa; Hideo Miura, Koshigaya; Masayuki Suzuki, Kokubunji; Shinji Nishihara; Shuji Ikeda, both of Koganei; Masashi Sahara, Kodaira; Shinichi Ishida, Higashimurayama; Hiromi Abe, Tokyo; Atushi Ogishima, Tachikawa; Hiroyuki Uchiyama; Sonoko Abe, both of Higashimurayama, all of Japan

[73] Assignee: Hitachi, Ltd., Tokyo, Japan

[ * ] Notice: This patent issued on a continued prosecution application filed under 37 CFR 1.53(d), and is subject to the twenty year patent term provisions of 35 U.S.C. 154(a)(2).

[21] Appl. No.: 08/747,392

[22] Filed: Nov. 12, 1996

[30] Foreign Application Priority Data

Nov. 14, 1995 [JP] Japan 7-295220

Feb. 20, 1996 [JP] Japan 8-031655

[51] Int. C I. H01L 23/48

[52] U.S. CI 257/754; 257/755; 257/763;

257/768; 257/770

[58] Field of Search 257/753, 759,

257/755, 763, 764, 768, 769, 770; 438/301

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