Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active...http://www.google.es/patents/US20110312166?utm_source=gb-gplus-sharePatente US20110312166 - Methods of Manufacturing Power Semiconductor Devices with Shield and Gate Contacts
Methods of Manufacturing Power Semiconductor Devices with Shield and Gate ...
Número de solicitud: 13/219,281 Número de publicación: US 2011/0312166 A1 Fecha de presentación: 26 Ago 2011 Patente emitida: US8129245 ( Fecha de emisión 6 Mar 2012)
Methods of manufacturing power semiconductor devices include forming an epitaxial and dielectric layer, patterning and etching the dielectric layer, forming a first oxide layer, forming a first conductive layer on top of the first oxide layer, etching the first conductive layer away inside an active trench, forming a second oxide layer and second conductive layer. The second conductive layer does not extend completely over the first conductive layer in a first region outside of the active trench. The methods further include forming a third oxide layer over the second conductive layer, etching a first opening through the third oxide layer exposing the second conductive layer outside the active trench, etching a second opening through the second oxide layer outside the active trench in the first region exposing the first conductive layer but not the second conductive layer, and filling the first and second openings with conductive material.
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