Non-volatile electrically alterable semiconductor memory for analog and ...

[ii] Patent Number: 5,973,956 [45] Date of Patent: Oct. 26,1999

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FOREIGN PATENT DOCUMENTS
57-176598 10/1982 Japan .
Primary Examiner—Do Hyun Yoo

Attorney, Agent, or Firm—Blakely, Sokoloff, Taylor &
Zafman LLP

[57] ABSTRACT

Methods and apparatus for achieving analog storage in a non-volatile memory array. The array consists of memory cells that utilize Fowler-Nordheim tunneling for erasure and hot electron injection for programming. Writing into a cell is performed by an initial erasure followed by a controlled sequence of program operations during which the cell is programmed in small increments. The stored voltage is read after each program step and when the voltage read back from the cell is equal or just beyond the desired analog level, the sequence of program steps is terminated. The read condition for the cell applies a positive voltage to the drain or common line and a positive voltage to the control gate. The source is connected through a load device to a negative (ground) supply. The output from the cell is the actual voltage that exists at the source node. There is no current sensing or comparison with a reference voltage to determine the output state. A digital number can be represented by assigning a specific analog level to a digital number. The range of digital numbers that can be represented is determined by the analog voltage range divided by the accuracy to which the voltage may be stored and reliably retrieved. Other aspects and features of the invention are disclosed.

22 Claims, 9 Drawing Sheets

Page 2

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