US 20050026552A1
(19) United States
(12) Patent Application Publication (io) Pub. No.: US 2005/0026552 Al
Fawcett et al. (43) Pub. Date: Feb. 3,2005
Patent Application Publication Feb. 3,2005 Sheet 2 of 3 US 2005/0026552 Al
(22) Filed: Jul. 30, 2003
Publication Classification
(51) Int. CI.7 B24B 1 00
(52) U.S. CI 451 41
(57) ABSTRACT
A porous polishing pad is useful for polishing semiconductor substrates. The porous polishing pad has a porous matrix formed from a coagulated polyurethane and a non-fibrous polishing layer. The non-fibrous polishing layer has a polishing surface with a pore count of at least 500 pores per mm that decreases with removal of the polishing layer; and the polishing surface has a surface roughness Ra between 0.01 and 3 fim.
