System and method for assigning tags to control instruction processing in a ...

United States Patent im

Iadonato et al.

US005628021A [ii] Patent Number: [45] Date of Patent:

5,628,021 *May 6, 1997

[54] SYSTEM AND METHOD FOR ASSIGNING
TAGS TO CONTROL INSTRUCTION
PROCESSING IN A SUPERSCALAR
PROCESSOR

[75] Inventors: Kevin R. Iadonato, San Jose; Trevor A. Deosaran. Sunnyvale; Sanjiv Garg,

Fremont, all of Calif.

[73] Assignee: Seiko Epson Corporation. Japan

[ * ] Notice: The term of this patent shall not extend beyond the expiration date of Pat. No. 5.604.912.

[21] Appl. No.: 224,328
[22] Filed: Apr. 4,195*4

Related U.S. Application Data

[63] Continuation-in-part of Ser. No. 999,648, Dec. 31, 1992.

[51] Int. CI.6 G06F 9/30

[52] U.S. CI 395/800; 395/375; 364/DIG. 1;

364/231.8; 364/262.4; 364/262.9

[58] Field of Search 395/800.425,

395/375

[56] References Cited

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A tag monitoring system for assigning tags to instructions. A source supplies instructions to be executed by a functional unit. A register file stores information required for the execution of each instruction. A queue having a plurality of slots containing tags which are used for tagging the instructions. The tags are arranged in the queue in an order specified by the program order of their corresponding instructions. A control unit monitors the completion of executed instructions and advances the tags in the queue upon completion of an executed instruction. The register file stores an instruction's information at a location in the register file defined by the tag assigned to that instruction. The register file also contains a plurality of read address enable ports and corresponding read output ports. Each of the slots from the queue is coupled to a corresponding one of the read address enable ports. Thus, the information for each instruction can be read out of the register file in program order.

62 Claims, 7 Drawing Sheets

OTHER PUBLICATIONS

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