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(12) United States Patent ao) Patent No.: Us 7,145,225 B2
Lee (45) Date of Patent: Dec. 5,2006
(54) INTERPOSER CONFIGURED TO REDUCE THE PROFILES OF SEMICONDUCTOR DEVICE ASSEMBLIES AND PACKAGES INCLUDING THE SAME AND METHODS
(75) Inventor: Teck Kheng Lee, Singapore (SG)
(73) Assignee: Micron Technology, Inc., Boise, ID (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 361 days.
(21) Appl. No.: 10/150,893
(22) Filed: May 17, 2002
(65) Prior Publication Data
US 2003/0164543 Al Sep. 4, 2003 (30) Foreign Application Priority Data
Mar. 4, 2002 (SG) 200201263
An interposer includes a substrate, first and second sets of contact pads carried by the substrate, and receptacles formed in a surface of the substrate and exposing contact pads of the second set. The interposer may also include conductive traces carried by the substrate to electrically connect corresponding contact pads of the first and second sets. The receptacles are configured to at least partially receive conductive structures, such as solder balls, that are secured to the contact pads of the second set. Thus, the interposer is useful in providing semiconductor device assemblies and packages of reduced height or profile. Such assemblies and packages are also described, as are multi-chip modules including such assemblies or packages. In addition, methods for designing and fabricating the interposer are disclosed, as are methods for forming assemblies, packages, and multichip modules that include the interposer.
36 Claims, 6 Drawing Sheets
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