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(12) United States Patent

Savage et al.

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US006846149B2

(io) Patent No.: US 6,846,149 B2 (45) Date of Patent: Jan. 25, 2005

(54) SEMICONDUCTOR WAFER PROCESSING SYSTEM WITH VERTICALLY-STACKED PROCESS CHAMBERS AND SINGLE-AXIS DUAL-WAFER TRANSFER SYSTEM

(75) Inventors: Richard N. Savage, Scotts Valley, CA (US); Frank S. Menagh, Santa Cruz, CA (US); Helder R. Carvalheira, Scotts Valley, CA (US); Philip A. Troiani, Santa Cruz, CA (US); Dan L. Cossentine, Santa Cruz, CA (US); Eric R. Vaughan, Santa Cruz, CA (US); Bruce E. Mayer, Soquel, CA (US)

(73) Assignee: Aviza Technology, Inc., Scotts Valley, CA (US)

( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 187 days.

(21) Appl. No.: 09/996,869

(22) Filed: Nov. 27, 2001

(65) Prior Publication Data

US 2002/0033136 Al Mar. 21, 2002

Related U.S. Application Data

(62) Division of application No. 09/483,945, filed on Jan. 13, 2000.

(60) Provisional application No. 60/127,532, filed on Apr. 2, 1999, and provisional application No. 60/127,650, filed on Apr. 2, 1999.

(51) Int. CI.7 B25J 15/10; F26B 3/08

(52) U.S. CI 414/416; 414/217; 414/941

(58) Field of Search 414/217, 46, 935,

414/941; 118/719

[blocks in formation]

A semiconductor wafer processing system including a multichamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.

6 Claims, 16 Drawing Sheets

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