Integrated I/O interface for communication terminal

United States Patent

Gurak et al.

[ii]

[45]

Patent Number: Date of Patent:

4,981,371 Jan. 1,1991

[54] INTEGRATED I/O INTERFACE FOR COMMUNICATION TERMINAL

[75] Inventors: Richard J. Gurak, Summit; Robert Goeb, Spotswood, both of N.J.

[73] Assignee: ITT Corporation, New York, N.Y.

[21] Appl. No.: 312,508

[22] Filed: Feb. 17,1989

[51] Int. C1.5 H04L 9/00; H04M 11/06

[52] U.S. CI 380/49; 379/96;

370/110.1; 370/125

[58] Field of Search 380/9, 49, 50, 59;

364/180, 200, 900; 379/96; 370/60, 67, 85.1, 85.9, 94.1, 125, 110.1-111

[56] References Cited

U.S. PATENT DOCUMENTS

4,180,860 12/1979 Driscoll et al 364/900

4,199,809 4/1980 Pasahow et al 364/200

4,425,664 1/1984 Sherman et al 364/200 X

4,554,658 11/1985 Marten et al 370/85.1

4,638,451 1/1987 Hester et al 364/900

4,750,111 6/1988 Crosby, Jr. et al 364/200

4,813,040 3/1989 Futato 370/111

FOREIGN PATENT DOCUMENTS

0222544 5/1987 European Pat. Off. 370/125

3717315 12/1988 Fed. Rep. of Germany 370/125

Primary Examiner—Stephen C. Buczinski
Assistant Examiner—Bernarr Earl Gregory
Attorney, Agent, or Firm—Arthur L. Plevy

[57] ABSTRACT

An integrated I/O interface for a communication terminal, connectable with an external analog communication device and with an external digital communication device, includes an I/O interface subsystem having analog and digital arrays, a first connector for connecting the I/O interface subsystem to a digital processor for the terminal, and a second connector for connecting the I/O interface subsystem to both the analog communication device and the digital communication device. The digital array and the analog array including a CODEC are mounted on a platform carrier on the I/O interface subsystem board. The second connector is a single connector having pins for transmitting the analog signals, pins for the digital signals, a pin indicating whether the analog or digital mode is selected, and a pin indicating which external communication device is selected. The second connector also has common EMI and EMP protective filter circuits incorporated therein to protect the I/O interface subsystem.

15 Claims, 6 Drawing Sheets