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US006249841B1
(12) United States Patent ao) Patent No.: us 6,249,841 Bi
Sikes et al. (45) Date of Patent: Jun. 19,2001
(54) INTEGRATED CIRCUIT MEMORY DEVICE AND METHOD INCORPORATING FLASH AND FERROELECTRIC RANDOM ACCESS MEMORY ARRAYS
(75) Inventors: L. David Sikes; Michael Alwais, both of Colorado Springs; Donald G. Carrigan, Monument, all of CO (US)
(73) Assignee: Ramtron International Corporation,
Colorado Springs, CO (US)
( * ) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 U.S.C. 154(b) by 0 days.
"Different Approaches to Flash Memory Technology", http://ise.eng.uts.edu.au/ise/hyptech/miniprj/mnprj97a/ tank_lin/ap_flsh.htm, Nov. 5, 1998.
"Boot Block Flash Memory Technology", TN-28-01, Micron Technology, Inc., 1966.
"Atmel Introduces 16 Megabit Concurrentflash ReadWhile-Write Flash Devices", pp. 2-4, hhtp://www.atmel.com/atmel/news/19981102.html, Atmel Corporation, on or before Nov. 5, 1988.
* cited by examiner
An integrated circuit memory device and method incorporating Flash and ferroelectric random access memory arrays integrated on a common substrate. The present invention allows a relatively small amount of ferroelectric random access memory to mitigate many of the erase and write time disadvantages exhibited by current Flash technology devices. In particular, whether combined together as a single stand-alone memory device or embedded together as a portion of a processor, microcontroller or application specific integrated circuit ("ASIC"), a block of ferroelectric memory that is sized to match the largest sector of Flash memory can effectively compensate for the latter's slow erasure and write times.
21 Claims, 4 Drawing Sheets
