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TECHNIQUES FOR IMPROVING ETCH
RATE UNIFORMITY
BACKGROUND OF THE INVENTION
1. Field of the Invention 5 The present invention relates to fabrication of semiconductor integrated circuits and, more particularly, to improved methods and apparatus for ion-assisted etch processing in a plasma processing system.
2. Description of the Related Art
In the fabrication of semiconductor-based devices, e.g., integrated circuits or flat panel displays, layers of materials may alternately be deposited onto and etched from a substrate surface. As is well known in the art, the etching of the 15 deposited layers may be accomplished by a variety of techniques, including plasma-enhanced etching. In plasmaenhanced etching, the actual etching typically takes place inside a plasma processing chamber of a plasma processing system. To form the desired pattern on the substrate surface, 2Q an appropriate mask (e.g., a photoresist mask) is typically provided. A plasma is then formed from a suitable etchant source gas, or mixture of gases, and used to etch areas that are unprotected by the mask, thereby leaving behind the desired pattern. 25
To facilitate discussion, FIG. 1A depicts a simplified plasma processing apparatus 100 suitable for fabrication of semiconductor-based devices. The simplified plasma processing apparatus 100 includes a wafer processing chamber 102 having an electrostatic chuck (ESC) 104. The chuck 104 30 acts as an electrode and supports a wafer 106 (i.e., substrate) during fabrication. An edge ring 108 borders the edge of the chuck 104. In the case of etch processes, a number of parameters within the wafer processing chamber 102 are tightly controlled to maintain high tolerance etch results. 35 Process parameters governing etch results may include gas composition, plasma excitation, plasma distribution over the wafer 106, etc. Since the etch tolerance (and resulting semiconductor-based device performance) is highly sensitive to such process parameters, accurate control thereof is 40 required.
The surface of the wafer 106 is etched by an appropriate etchant source gas that is released into the wafer processing chamber 102. The etchant source gas can be released through a showerhead 110. The etchant source gas may also 45 be released by other mechanisms such as via a gas ring disposed inside the chamber or via ports built into the walls of the wafer processing chamber 102. During ion-assisted etch processes, Radio Frequency (RF) power supplied to showerhead 110 ignites the etchant source gas, thereby 50 forming a plasma cloud ("plasma") above wafer 106 during etch processes. It should be noted that other means of plasma excitation may also be used. For example, the application of microwave energy, the use of inductive coils, the introduction of a wave excited by an antenna, or capacitive coupling 55 to the showerhead 110 can also be used to excite the plasma. In ion-assisted etch processes, chuck 104 is typically RF powered using a RF power supply (not shown).
In an ion-assisted etch process, the local etch rate is dominated by ion concentration. Ion-assisted etch processes 60 are typically used to perform oxide etches or polysilicon etches. In other words, ion driven/assisted etch processes generally refer to etching processes wherein the etching is predominately facilitated by the physical reaction of the accelerated plasma ions ("ions") with the wafer (substrate). 65 Ion-assisted etching applications include, for example, sputtering, Reactive Ion Etching (RIE), chemical sputtering,
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chemically assisted physical sputtering, and physically assisted chemical sputtering.
With ion-assisted etching, application of RF power to the chuck 104 (as well as the showerhead 110) results in the formation of an electric field and in turn a sheath 112 above the wafer 106. The electric field associated with the sheath 112 promotes the acceleration of ions toward the top surface of the wafer 106. Ideally, the accelerated ions collide at an angle that is substantially perpendicular (i.e., substantially normal or about 90 degrees) with the respect to the surface of the wafer 106 during etch processes. The accelerated ions that collide with the wafer 106 operate to "physically" etch the wafer 106.
The edge ring 108 is an insulator material that is electrically floating (i.e., not RF powered). Edge ring 108 is used to shield the edge of the chuck 104 from ion bombardment such as during etch processes. Edge ring 108 can also help focus the ion bombardment with respect to the wafer 106. As shown in FIG. 1A, the chuck 104 can be surrounded by an inner surface 114 of the edge ring 108. The inner surface 114 is also within the outer edge of the wafer 106.
An outer surface 116 of the edge ring 108 extends beyond the outer edge of the wafer 106. An upper portion of the inner surface 114 of the edge ring 114 is adjacent to not only the chuck 104 but also the wafer 106. Conventionally, a top surface 118 of the edge ring 108 is below or about the same level as a top surface of the wafer 106.
One major problem associated with ion-assisted etch processes using a convention plasma processing apparatus is that the etch rate is not uniform across the wafer 106. More specifically, etch rate at locations near the edges of the wafer is significantly higher than the etch rate for points near the center of the wafer. FIG. IB illustrates a cross-section of the wafer 106 following etch processes where the etched depth is greater at a perimeter portion 120 of the wafer 106 than at a middle portion 122 of the wafer 106.
The non-uniform etch rate is attributed primarily to the non-uniform thickness of the sheath 112 above the surface of wafer 106. As depicted in FIG. 1A, the thickness (or the plasma density at the sheath boundary) of the sheath 112 at the middle portion 120 of the wafer 106 is significantly thicker than the thickness (density) of the sheath 112 at the perimeter portion 11 6 of the wafer 106. That is, in the vicinity of the electronically floating region above the edge ring 108 the sheath "curves" near the perimeter of the wafer 106. The sheath curvature around the perimeter of the wafer
106 causes relatively more ions to collide near the perimeter of the wafer 106 during ion-assisted etch processes. A higher collision rate near the perimeter results in relatively higher etch rates near the perimeter of the wafer (see FIG. IB).
An additional problem is caused by the sheath curvature. In particular, the sheath curvature near the perimeter of the wafer 106 induces the ions to collide at angles that are not substantially perpendicular (i.e., not substantially normal or about 90 degrees) with respect to the surface of the wafer 106. In ion-assisted etch processes, ion collisions at such non-perpendicular angles also contribute to higher etch rates. Furthermore, the non-perpendicular angles of ion collision near the edges can have an undesired "tilting" effect on the etched features (e.g., trenches, vias or lines) on the wafer 106. Tilting generally refers to an undesired effect during etching whereby one or more sides of a feature are not substantially perpendicular with the surface of a wafer. Here, at the perimeter of the wafer 106, the "tilting" effect produces an asymmetric feature. Features are intended to be symmetric, so asymmetric features are undesired and can
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cause severe problems that render a fabricated integrated circuit essentially defective.
One potential solution to address some of the problems associated with non-uniformity of etch rates in ion-assisted etching processes is to enlarge the chuck so that it extends 5 beyond the edges of wafer. Enlarging the chuck would effectively shift the sheath curvature beyond the edges of the wafer. This may be a feasible solution for purely chemical etching applications. However, this solution would not be feasible for ion-assisted etch processes since the extended 1° portion of the chuck would also be exposed to ions and the etching process. Exposing the chuck can cause particulate and/or heavy metal contamination during the ion-assisted etch processes. The extended portions of the chuck would also be exposed to significantly higher etch rates to com- :5 pound the problems associated with contamination. Further, the high etch rates at the exposed portions of the chuck can rapidly deteriorate the chuck which can lead to often replacement of the entire chuck which is an expensive part to be a consumable. 20
To curtail some of the problems associated with etch rate non-uniformity associated with ion-assisted etch processes, it may be possible to alter the distribution of plasma above the wafer. For example, a conventional "focus ring" can be placed above the sheath. By attempting to focus the plasma 25 on the wafer, it is believed that a traditional focus ring may reduce the ion density (plasma) distributed over the edges of a wafer. If successful, the reduction of plasma distribution could result in lowering the etch rates near the perimeter of the wafer (i.e., the number of ions that collide near the edges 30 would be reduced). Using an external element such as a focus ring may marginally compensate for the sheath curvature effect. However, introduction of an another element to the ionized etching -process can raise new problems associated with contamination and/or costly consumable 35 parts. In addition, use of a traditional focus ring may not even be feasible for some ionized etching applications.
In the view of the foregoing, there is a need for improved methods and apparatus for improving etch rate uniformity in 4Q ion-assisted processes.
SUMMARY OF THE INVENTION
Broadly speaking, the invention relates to improved methods and apparatus for ion-assisted etch processing in a 45 plasma processing system. The invention operates to improve etch rate uniformity across a substrate (wafer). The invention can be implemented in numerous ways, including as a device, an apparatus and a method. Several embodiments of the invention are discussed below. 50
An improved plasma processing apparatus according to one embodiment of a first aspect of the invention is disclosed. The improved plasma processing apparatus includes a wafer processing chamber having an electrostatic chuck (ESC) and an elevated edge ring. The chuck acts as an 55 electrode and supports a wafer (i.e., substrate) during fabrication. In accordance to one embodiment of the aspect of the invention, the elevated edge ring that borders the edge of the chuck and extends upward beyond the top surface of the wafer. 60
An improved plasma processing apparatus according to one embodiment of a second aspect of the invention is disclosed. Here, the plasma processing apparatus uses a grooved edge ring. The grooved edge ring includes a grooved area that essentially surrounds the area near the 65 edge of the wafer as well as an area below the bottom surface of the wafer.
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An improved plasma processing apparatus according to one embodiment of a third aspect of the invention is disclosed. The improved plasma processing apparatus includes a wafer processing chamber having a radio frequency (RF) powered and a RF coupled edge ring. The RF coupled edge ring is placed over a portion of the RF powered chuck and adjacent to an edge of the substrate, and a portion of RF energy provided by the RF powered chuck is coupled to the inner RF coupled edge ring.
The invention has numerous advantages. One advantage of the invention is that etch rate uniformity across a substrate surface is significantly improved. Another advantage of the invention is that significant improvement in etch rate uniformity is achieved without risking contamination of the processing chamber. Yet another advantage is that tilting of etched features can be substantially eliminated.
Other aspects and advantages of the invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the invention.
BRIEF DESCRIPTION OF THE DRAWINGS
The present invention will be readily understood by the following detailed description in conjunction with the accompanying drawings, wherein like reference numerals designate like structural elements, and in which:
FIG. 1A depicts a simplified plasma processing apparatus 100 suitable for fabrication of semiconductor-based devices.
FIG. IB illustrates a cross-section of a wafer following etch processes where the etched depth is greater at a perimeter portion of the wafer than at a middle portion of the wafer.
FIG. 2 illustrates a plasma processing apparatus including an elevated edge ring accordance to one embodiment of a first aspect of the invention.
FIG. 3 illustrates a plasma processing apparatus 300 including a grooved edge ring in accordance to one embodiment of a second aspect of the invention.
FIG. 4 illustrates a plasma processing apparatus 400 including an inner RF coupled edge ring and a outer edge ring, in accordance to one embodiment of a third aspect of the invention.
FIG. 5 illustrates a plasma processing apparatus 500 including a RF coupler, an inner RF coupled edge ring and an outer edge ring, in accordance to another embodiment of the third aspect of the invention.
FIG. 6 illustrates a portion of a cross section of a plasma processing apparatus 600 including dielectric fillers, in accordance to yet another embodiment of the third aspect of the invention.
DETAILED DESCRIPTION OF THE
INVENTION
The invention pertains to improved methods and apparatus for ion-assisted etch processing in a plasma processing system. The invention operates to improve etch rate uniformity across a substrate (wafer). Etch rate uniformity improvement provided by the invention not only improves fabrication yields but also is cost efficient and does not risk particulate and/or heavy metal contamination.
Embodiments of several aspects of the invention are discussed below with reference to FIGS. 2-6. However, those skilled in the art will readily appreciate that the
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