Graphic processing having apparatus for outputting FIFO vacant information ...

CENTRAL PROCESSING UNIT II BUS SWITCH 20 OR 2 I GRAPHIC DISPLAY PROCESSOR 10

(INCLUDING ADDRESS DECODER 17)

ACCESS REQUEST TO THE FRAME BUFFER 14

ASSERT A HALT SIGNAL "HALT"

TO GRAPHIC DISPLAY PROCESSOR 10

WHEN "HALT" IS INPUTTED .THE ADDRESS AND DATA BUSES ARE SET TO THE TRY STATE IN THE PERIOD OUTSIDE THE EXTERNAL ACCESS INHIBIT PERIOD (TO ASSERT "BUSY"SIGNAL) TO WHICH PRIORITY IS BEFOREHAND SET

THE BUS SWITCH IS CHANGED OVER DURING
THE "BUSY NEGATE" PERIOD OF THE GRAPHIC
DISPLAY PROCESSOR 10 AND "ACK" SIGNAL IS
ASSERTEO TO MPU

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WHEN "ACK" SIGNAL IS RECEIVED. A SERIES OF OPERATIONS ARE TERMINATED