Búsqueda Imágenes Maps Play YouTube Noticias Gmail Drive Más »
Búsqueda avanzada de patentes | Imágenes de página | Historial web | Iniciar sesión

Patentes

  
[merged small][merged small][subsumed][table][graphic][merged small][merged small]
[merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][graphic][merged small][merged small][merged small][merged small][merged small][merged small][merged small][graphic][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][merged small][graphic][merged small][merged small][merged small]

METHOD AND APPARATUS FOR CARRYING
OUT LOOPBACK TEST

BACKGROUND OF THE INVENTION 5

(1) Field of the Invention

The present invention relates to a method and apparatus for carrying out a loopback test in a data communication system and, more particularly, to a method for carrying out a loopback test in a data communication ^ system which is comprised of many data communication stations connected in a row by transmission lines, that is the so-called multilevel data communication system.

The data communication system is basically com- 15 prised of a first data communication station, a second data communication station and a transmission line connecting the two. The data communication system cannot carry out normal operation when trouble occurs anywhere in the system. Generally, a loopback test is 20 carried out in the system to find the location where the trouble has occurred. Also, the loopback test is carried out in the system to check the area of distribution of noise. The loopback test is generally carried out by comparing two signals. The first signal is a test signal 25 transmitted from a first data communication station and second signal is a test signal which has been transmitted from the first data communication station to a second data communication station and has been returned therefrom to the first data communication station. If the 30 two signals coincide with each other, no trouble exists between the first and second data communication stations. In contrast, if the two signals do not coincide with each other, some trouble exists therebetween.

(2) Description of the Prior Art 35 In the prior art, two methods for carrying out the

loopback test are known. In a first known method, a test channel is employed in the system. This test channel exists independently of the usual information data channel. Control data for carrying out the loopback test is 40 transmitted on the newly employed test channel. In a second known method a control signal for carrying out the loopback test is composed of both a tone signal and a control data signal. The tone signal is, for example a sine wave signal having a fixed frequency of less than 45 300 Hz or greater than 3,400 Hz in the case where the transmission line is formed by an ordinary telephone line. The tone signal is useful for indicating that the forthcoming signal is not the usual information data, but the control data signal for carrying out the loopback 50 test.

However, each of the above described two known methods have disadvantages. The first method has the following disadvantages: a first disadvantage is that the new control circuit for carrying out the loopback test 55 has to be connected in parallel to each data communication station; a second disadvantage is that it is hard to allot a channel for the test in the usual information data channels, especially when there is no extra channel among the information data channels; third disadvan- 60 tage is that the first method can not be applied to the multilevel data communication system unless a modem for the test channel is mounted in each data communication station. On the other hand, the second method has the following disadvantages: a first disadvantage is that 65 the tone signal can be transferred only to two adjacent data communication stations connected by a transmission line, for example a telephone line; if adjacent data

communication stations are connected by cables, and the two stations are modems, or a modem and a time division multiplexer, the tone signal can not be transferred on the cables. This is because the tone signal is not a digital interface signal but an analog signal; a second disadvantage is that this second method can not be applied to a multilevel data communication system unless an appropriate interface means for the tone signal is mounted in each data communication station.

SUMMARY OF THE INVENTION

Therefore, it is an object of the present invention to provide a method and apparatus, for carrying out a loopback test in a data communication system, which do not have the disadvantages of the two above-mentioned methods.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be more apparent from the ensuing description with reference to the accompanying drawings wherein:

FIG. 1A is a schematic block diagram of one example of a known data communication system;

FIG. IB is a schematic block diagram of another example of a known data communication system;

FIG. 2 is a schematic block diagram of a first data communication station which performs a loopback test in accordance with one method of the present invention;

FIG. 3 is a schematic block diagram of a second data communication station to be tested by the first data communication station in accordance with the method of the present invention;

FIG. 4 shows timing charts utilized to illustrate the operation of the first data communication station 20 of FIG. 2;

FIG. 5 is a detailed circuit diagram of an example of the first data communication station 20 of FIG. 2, and;

FIG. 6 is a detailed circuit diagram of an example of the second data communication station 30 of FIG. 3.

DESCRIPTION OF THE PREFERRED
EMBODIMENT

In FIG. 1A, the reference numeral 11 represents a central processing unit (CPU), 12-1,12-2,12-3 and 12-4 represent modems (MD1, MD2, MD3, MD4), respectively, 13 represents a terminal controller (TC), 14-1 and 14-2 represent terminal equipment (Tl, T2), respectively, 15 represents a cable, and 16 represents a transmission line.

The difference between the system illustrated in FIG. 1A and the system illustrated in FIG. IB, is that the latter system further includes time division multiplexers. In FIG. IB, the reference numerals 17-1, 17-2 and 17-3 represent time division multiplexers (TDM1, TDM2, TDM3). Members in FIG. IB and FIG. 1A which are represented by the same reference numerals or symbols, are identical with each other. The time division multiplexer, for example, the time division multiplexer (TDM1) 17-1, is connected to the terminal equipment (Tl, T2) 14-1, 14-2 and the central processing unit (CPU) 11. Information data produced from these members is applied to the multiplexer 17-1 and is time-divisionally multiplexed therein. The multiplexed information data is then transmitted to the time division multiplexer (TDM2) 17-2 by way of modems 12-1, 12-2 and the transmission line 16 therebetween. The information

3 4

data is distributed from the multiplexer 17-2 to a desired The means for distinguishing the test signal from the

terminal station, such as the modems, the terminal con- information data signal, according to the present inven

troller or the terminal equipment. tion, is illustrated in FIGS. 2 and 3. FIG. 2 is a sche

The terminal controller 13 collectively controls the matic block diagram illustrating a first data communica

operations of the terminal equipment 14-4 and 14-5 by 5 tion station which performs the loopback test in accor

an instruction generated in the controller 13 itself, or by dance with the method of the present invention. FIG. 3

an instruction supplied from the central processing unit is a schematic block diagram illustrating a second data

11. communication station to be tested by the first data

The time division multiplexer 17-2 is connected to the communication station in accordance with the method

remote time division multiplexer 17-3 by way of the 10 of the present invention. The first data communication

modems 12-3 and 12-4. Further, the multiplexer 17-2 is station 20 of FIG. 2 is specifically comprised of, for

connected to the remote terminal equipment 14-7 by example, the central processing unit 11 and the modem

way of modems 12-7 and 12-8. Furthermore, the multi- 12-1 (see FIG. 1A). The second data communication

plexer 17-2 is directly connected to the remote terminal station 30 specifically represents, for example, the

equipment 14-3, and the multiplexer 17-2 is connected 15 modem 12-2 (see FIG. 1A).

to the remote terminal equipment 14-4 and 14-5 by way The operation of the first data communication station

of the terminal controller 13. 20 illustrated in FIG. 2 will be explained by referring to

In the data communication system, for example, the FIG. 4. FIG. 4 is composed of timing charts utilized for

data communication system illustrated in FIG. 1A, the explaining the operation of the first data communication

loopback test is carried out to find the position where 20 station 20.

trouble has occurred in this system. When the loopback The central processing unit 11 provides a test control test is carried out in the system, a first data communica- signal SI to a controller 24. The signal SI commands tion station, for example, the central processing unit 11, commencement of the loopback test. The signal SI is transmits a test signal to a second data communication indicated in FIGS. 2 and 4. When the controller 24 station, for example, the modem 12-2. Then the modem 25 receives the signal SI, the controller 24 actuates a 12-2 sends back the received test signal to the central switch SW1 by way of a line LI, so as to connect a processing unit 11. The unit 11 compares the test signal contact CI to a terminal Al. Simultaneously, the conwhich was transmitted therefrom and the test signal trailer 24 actuates a timer 23 by way of a line L2. Then, which is sent back from the modem 12-2. If the two test the timer 23 energizes a character generator 22 by way signals coincide with each other, the unit 11 determines 30 of a line L3 during a predetermined time Tl (see FIG. that there is no trouble between the unit 11 and the 4). Simultaneously, the timer 23 actuates a switch SW2 modem 12-2. In contrast, if the two test signals do not by way of a line L4, so' as to connect a contact C2 to a coincide with each other, the unit 11 determines that the terminal A2. The character generator 22 produces a trouble occurs therebetween. As previously mentioned, first bit pattern and a second bit pattern, which are there are two methods for carrying out the loopback 35 different from each other. The first bit pattern may be, test. However, these two methods contain the aforesaid for example, (1001001001...), and the second bit patvarious kinds of disadvantages. tern may be, for example, (0110110110 . . . ). In the The method for carrying out the loopback test, ac- example of the present invention, the first bit pattern is cording to the present invention, will now be explained. (11111...) and the second bit pattern is (00000 . . . ). The outstanding feature of the present invention resides 40 The first and second bit patterns are applied to the in the fact that the test signal can be transferred by way terminal A2 and a terminal B2 of the switch SW2. The of the usual information data channel. Accordingly, it is timer 23, as mentioned above, defines the predeternot necessary to employ the aforesaid new control cir- mined time Tl. The time Tl corresponds to the socuit and the aforesaid new test channel in the system, as called Preparatory-phase. During the Preparatoryin the above mentioned first known method. Also, it is 45 phase Tl, a scrambler (SCR) 21 receives a bit pattern not necessary to employ the aforesaid modem for the signal S3 (see FIGS. 2 and 4). Since the contact C2 of test channel, as in the first known method, or the afore- the switch SW2 is connected to the terminal A2 during said interface means, as in the second known method. In the Preparatory-phase Tl, the bit pattern signal S3 is the other words, the method of the present invention can be all "1" bit pattern signal. Then, the scrambler 21 scramapplied to not only the single-level data communication 50 bles the all "1" bit pattern signal, so as to produce a first system but, also, the multilevel data communication pseudo-random noise signal (hereinafter referred to as system. This is because, the test signal used in the pres- PN1 signal). The scrambler 21 scrambles the all "1" bit ent invention is not a form of a special signal, but is pattern by multiplying these "1" bits in accordance with substantially the same as the form of the usual informa- a predetermined polynominal, for example, 1+X4+X7, tion data signal. Thus, this test signal can be transmitted 55 and produces the PN1 signal. Accordingly, a transmisto the end data communication station, as is the usual sion signal S4 (see FIGS. 2 and 4) on a line L5 is corninformation data signal. As mentioned above, in the posed of the PN1 signal during the Preparatory-phase present invention, both the test signal and the usual Tl. The PN1 signal indicates, to the second data cominformation data signal are transmitted over the same munication station 30 (FIG. 3), that the forthcoming information data channel. Therefore, a means for distin- 60 transmission signal S4 is not the usual information data gushing the test signal from the usual information data signal, but the test signal. Thus, the second data commusignal must be provided. However, a practical signal nication station can distinguish the test signal from the distinguishing means has not previously been devel- usual information data signal. In this case, it is important oped. It should be noted that, if no such means is em- to note that a bit pattern which is the same as the bit ployed, any of the data communication stations will 65 pattern of the PN1 signal should not coincide with any treat the test signal as the information data signal or vice of bit patterns which compose the usual information versa, and a malfunction will occur in the data commu- data signal. If such coincidence of signals occurs at the nication station. second data communication station, a malfunction will

occur in this station. In the example of the present invention, the PN1 signal is a psuedo-random noise signal and, further, the PN1 signal has a very long bit length, for example, a 64 bit length, compared to a conventional bit length of the information data, signal, for example, 8 through 10 bits. Therefore, the probability of occurence of the above mentioned coincidence of signals is 2-64. In other words, such coincidence of signals will occur with the probability of one time per 30,000,000 years when the transfer rate of the information data signal is 9,600 bit per second. Thus, it will be understood that the method of the present invention is definitely practical for use. If the probability can be decreased, the bit length can be shorter than 64.

At the end of Preparatory-phase Tl, the timer 23 actuates the switch SW1, by way of a line L6, so as to connect the contact CI to the terminal Bl. At the same time, the central processing unit 11 provides a test control data signal S2 (See FIGS. 2 and 4), instead of the information data signal, during an Address/Commandphase T2 and a Test-phase T3 (see FIG. 4). The test control data signal S2 is composed of address data AD, command data CM and test data TD. The transmission signal S4 (see FIG. 4) on the line L5 is composed of the test control data signal S2 during the phases T2 and T3. The address data AD specifies a second data communication station to be tested. For example, in FIG. 1A, the modem 12-2 has an address AD. The terminal controller 13 has an address AD', the terminal equipment 14-1 has an address AD" and so on. Accordingly, in a singlelevel data communication system comprising only, for example, the modems 12-1 and 12-2, such address data may be deleted. The command data CM specifies one of the various kinds of test commands. Accordingly, in a data communication system which requires only the loopback test to be carried out therein, such command data may also be deleted. In such system, the PN1 signal may indicate that the loopback test is to be carried out without providing the loopback test command CM.

At the end of the Test-phase T3, the timer 23 actuates the SW1, by way of the line LI, so as to connect the contact CI to the terminal Al again. AT the same time, the timer 23 actuates the SW2, by way of the line L4, so as to connect the contact C2 to the terminal B2. Then, a Terminating-phase T4 (see FIG. 4) begins. During the 45 Terminating-phase T4, the scrambler 21 receives the bit pattern signal S3 (see FIGS. 2 and 4). Since the contact C2 of the switch SW2 is connected to the terminal B2 during the Terminating-phase T4, the bit pattern signal S3 is the all "0" bit pattern signal. Then, the scrambler 21 scrambles the all "0" bit pattern signal so as to produce a second pseudo-random noise signal (hereinafter referred to as PN2 signal). The scrambler 21 scrambles the all "0" bit pattern by multiplying these "0" bits in accordance with the aforesaid polynominal, that is, 1+ X4+X7, and produces the PN2 signal. Accordingly, the transmission signal S4 (see FIGS. 2 and 4) on the line L5 is composed of the PN2 signal during the Terminating-phase T4. The PN2 signal indicates, to the second data communication station 30 (FIG. 3), that the loopback test is now finished.

The transmission signal S4 on the line L5 is transmitted to the second data communication station, via a modem transmitter (MT) 25, as a sending data signal SD (see FIG. 2), during the phases Tl through T4. The transmitter 25 acts as a modulator.

Referring to FIG. 3, the second data communication station 30, that is the modem 12-2 of FIGS. 1A and IB,

10

15

20

25

30

35

40

50

55

60

65

receives the sending data signal SD supplied from the first data communication station 20 (see FIG. 2). The signal, SD via a modem receiver (MR) 31, is applied, on one hand, to a descrambler (DSC) 32, and is applied, on the other hand, to the next station, for example, the terminal controller 13 and so on of FIG. 1A, through the station 30. The descrambler 32 descrambles the signal SD in accordance with the aforesaid polynominal 1+X4+X7. The descrambled signal SD is applied to a signal detector SDET, which is comprised of a "1" bit detector (DTI) 33-1, a "0" bit detector (DT2) 33-2, a first counter (CT1) 34-1 and a second counter (CT2) 34-2. Thus, the signal detector SDET is very simple in construction. This is because, in the example of the present invention, the all "1" bit pattern signal is produced from the character generator 22 (see FIG. 2) as the first bit pattern, and the all "0" bit pattern signal is produced therefrom as the second bit pattern. If the bit pattern is, for example (1001001001...) or (0110110110 ...), the signal detector SDET must be comprised of a ROM (Read Only Memory) which stores the above bit patterns (1001001001 . . . ) and (0110110110 . . . ), a register means which holds the signal SD and a comparator means which compares the content of the register means with the content of the ROM, whereby the signal detector SDET will become very complicated in construction.

In the signal detector SDET, each time the "1" bit pulse appears in the descrambled signal SD from the descrambler 32, the first counter 34-1 increases the count number thereof, while, each time the "0" bit pulse appears in the descrambled signal SD, the second counter 34-2 increases the count number thereof. However, each time the "1" bit pulse appears in the descramble signal SD, the second counter 34-2 is reset to zero. Similarly, each time the "0" bit appears therein, the first counter 34-1 is reset to zero. Therefore, the first counter 34-1 can increase the count number thereof only when successive "1" bit pulse trains appear in the descrambled signal SD. Contrary to this, the second counter 34-2 can increase the count number thereof only when successive "0" bit pulse trains appear in the descrambled signal SD.

At the time the PN1 signal (see FIG. 4) of the signal SD is applied to the descrambler 32, the first counter 34-1 successively increases its count number, because PN1 signal is an all "1" bit pattern signal having a bit length of, for example, 64 bits. When the count number of the first counter 34-1 reaches 64, the output of the counter 34-1 is applied to the set-input of a flip-flop circuit 35. At this time, the signal detector SDET determines that the first data communication station 20 (see FIG. 2) has commenced the loopback test in the data communication system, and the SDET causes the flipflop circuit 35 to hold a logic "1" at its Q-output. The logic "1" of the Q-output makes a switch SW3 of a loopback means LB close. Then, the input of an address/Command detector (ACDT) 36 is connected to a line L7. When the detector 36 detects that the address data AD (see FIG. 4) is the same as the address of this data communication system 30, and also detects that the command data CM (see FIG. 4) commands to carry out the loopback test, then the output from the detector 36 operates a switch SW4, by way of a line L8, so as to connect a contact C4 to a terminal A4. As a result, a loopback line, which is comprised of the line L7, a line L9 and a line L10, is created. If the detector 36 detects that the address data AD and the command data CM

« AnteriorContinuar »